mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-28 21:34:23 +00:00
Use register masks on SPARC call instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189085 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
d93969c32a
commit
b581261240
@ -880,6 +880,13 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI,
|
|||||||
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
|
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
|
||||||
Ops.push_back(DAG.getRegister(toCallerWindow(RegsToPass[i].first),
|
Ops.push_back(DAG.getRegister(toCallerWindow(RegsToPass[i].first),
|
||||||
RegsToPass[i].second.getValueType()));
|
RegsToPass[i].second.getValueType()));
|
||||||
|
|
||||||
|
// Add a register mask operand representing the call-preserved registers.
|
||||||
|
const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
|
||||||
|
const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
|
||||||
|
assert(Mask && "Missing call preserved mask for calling convention");
|
||||||
|
Ops.push_back(DAG.getRegisterMask(Mask));
|
||||||
|
|
||||||
if (InFlag.getNode())
|
if (InFlag.getNode())
|
||||||
Ops.push_back(InFlag);
|
Ops.push_back(InFlag);
|
||||||
|
|
||||||
@ -1112,6 +1119,12 @@ SparcTargetLowering::LowerCall_64(TargetLowering::CallLoweringInfo &CLI,
|
|||||||
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
|
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
|
||||||
RegsToPass[i].second.getValueType()));
|
RegsToPass[i].second.getValueType()));
|
||||||
|
|
||||||
|
// Add a register mask operand representing the call-preserved registers.
|
||||||
|
const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
|
||||||
|
const uint32_t *Mask = TRI->getCallPreservedMask(CLI.CallConv);
|
||||||
|
assert(Mask && "Missing call preserved mask for calling convention");
|
||||||
|
Ops.push_back(DAG.getRegisterMask(Mask));
|
||||||
|
|
||||||
// Make sure the CopyToReg nodes are glued to the call instruction which
|
// Make sure the CopyToReg nodes are glued to the call instruction which
|
||||||
// consumes the registers.
|
// consumes the registers.
|
||||||
if (InGlue.getNode())
|
if (InGlue.getNode())
|
||||||
|
@ -556,10 +556,7 @@ let Uses = [FCC] in
|
|||||||
// Section B.24 - Call and Link Instruction, p. 125
|
// Section B.24 - Call and Link Instruction, p. 125
|
||||||
// This is the only Format 1 instruction
|
// This is the only Format 1 instruction
|
||||||
let Uses = [O6],
|
let Uses = [O6],
|
||||||
hasDelaySlot = 1, isCall = 1,
|
hasDelaySlot = 1, isCall = 1 in {
|
||||||
Defs = [O0, O1, O2, O3, O4, O5, O7, G1, G2, G3, G4, G5, G6, G7,
|
|
||||||
D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15,
|
|
||||||
ICC, FCC, Y] in {
|
|
||||||
def CALL : InstSP<(outs), (ins calltarget:$dst, variable_ops),
|
def CALL : InstSP<(outs), (ins calltarget:$dst, variable_ops),
|
||||||
"call $dst", []> {
|
"call $dst", []> {
|
||||||
bits<30> disp;
|
bits<30> disp;
|
||||||
|
Loading…
x
Reference in New Issue
Block a user