diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index d04bf9130e9..b7d8b19cbbe 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -573,8 +573,7 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{ // There is alloca()'s in this function, must reference off the frame // pointer instead. FrameReg = getFrameRegister(MF); - if (STI.isTargetDarwin()) - Offset -= AFI->getFramePtrSpillOffset(); + Offset -= AFI->getFramePtrSpillOffset(); } unsigned Opcode = MI.getOpcode(); @@ -882,6 +881,12 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const { } } + if (hasFP(MF)) { + MF.changePhyRegUsed(FramePtr, true); + NumGPRSpills++; + CanEliminateFrame = false; + } + if (!CanEliminateFrame) { AFI->setHasStackFrame(true); @@ -895,11 +900,6 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const { ForceLRSpill = false; } - if (STI.isTargetDarwin()) { - MF.changePhyRegUsed(FramePtr, true); - NumGPRSpills++; - } - // If stack and double are 8-byte aligned and we are spilling an odd number // of GPRs. Spill one extra callee save GPR so we won't have to pad between // the integer and double callee save areas. @@ -1030,7 +1030,7 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { ++MBBI; // Point FP to the stack slot that contains the previous FP. - if (STI.isTargetDarwin()) + if (hasFP(MF)) BuildMI(MBB, MBBI, TII.get(isThumb ? ARM::tADDrSPi : ARM::ADDri), FramePtr) .addFrameIndex(FramePtrSpillFI).addImm(0); @@ -1116,7 +1116,7 @@ void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, if (isThumb) emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII); else { - if (STI.isTargetDarwin()) { + if (hasFP(MF)){ NumBytes = AFI->getFramePtrSpillOffset() - NumBytes; // Reset SP based on frame pointer only if the stack frame extends beyond // frame pointer stack slot. @@ -1131,7 +1131,6 @@ void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, } else if (NumBytes) { emitSPUpdate(MBB, MBBI, NumBytes, false, TII); } - // Move SP to start of integer callee save spill area 2. movePastCSLoadStoreOps(MBB, MBBI, ARM::FLDD, 3, STI); emitSPUpdate(MBB, MBBI, AFI->getDPRCalleeSavedAreaSize(), false, TII); diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll index abf6b4c0400..fd4fa0126fc 100644 --- a/test/CodeGen/ARM/hello.ll +++ b/test/CodeGen/ARM/hello.ll @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | grep mov | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep mov | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin --disable-fp-elim | grep mov | wc -l | grep 2 %str = internal constant [12 x sbyte] c"Hello World\00" diff --git a/test/CodeGen/ARM/insn-sched1.ll b/test/CodeGen/ARM/insn-sched1.ll index 5c9a28a1d71..a9309011c4d 100644 --- a/test/CodeGen/ARM/insn-sched1.ll +++ b/test/CodeGen/ARM/insn-sched1.ll @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 | grep mov | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 --disable-fp-elim | grep mov | wc -l | grep 2 int %test(int %x) { %tmp = cast int %x to short diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll index bef0687795f..0a25186be51 100644 --- a/test/CodeGen/ARM/ldm.ll +++ b/test/CodeGen/ARM/ldm.ll @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmia" | wc -l | grep 2 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmib" | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep "ldmfd sp\!" | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin --disable-fp-elim | grep "ldmfd sp\!" | wc -l | grep 3 %X = external global [0 x int]