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white space cleanups

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139994 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem 2011-09-18 10:29:29 +00:00
parent 89af15ee11
commit b6266fb602
1 changed files with 4 additions and 5 deletions
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9
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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@ -61,8 +61,8 @@ class VectorLegalizer {
// Implements expansion for UINT_TO_FLOAT; falls back to UnrollVectorOp if
// SINT_TO_FLOAT and SHR on vectors isn't legal.
SDValue ExpandUINT_TO_FLOAT(SDValue Op);
// Implement vselect in terms of XOR, AND,OR when blend is not supported
// by the target.
// Implement vselect in terms of XOR, AND, OR when blend is not supported
// by the target.
SDValue ExpandVSELECT(SDValue Op);
SDValue ExpandFNEG(SDValue Op);
// Implements vector promotion; this is essentially just bitcasting the
@ -277,9 +277,8 @@ SDValue VectorLegalizer::ExpandVSELECT(SDValue Op) {
// AND,OR,XOR, we will have to scalarize the op.
if (!TLI.isOperationLegalOrCustom(ISD::AND, VT) ||
!TLI.isOperationLegalOrCustom(ISD::XOR, VT) ||
!TLI.isOperationLegalOrCustom(ISD::OR, VT)) {
return DAG.UnrollVectorOp(Op.getNode());
}
!TLI.isOperationLegalOrCustom(ISD::OR, VT))
return DAG.UnrollVectorOp(Op.getNode());
assert(VT.getSizeInBits() == OVT.getSizeInBits() && "Invalid mask size");
// Bitcast the operands to be the same type as the mask.