From b664a60ecf4838b2edeca624562c5457bf9fc84e Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Tue, 24 Feb 2015 01:37:31 +0000 Subject: [PATCH] Fix handling of negative offsets for AddrModeT2_i8s4 in rewriteT2FrameIndex. This is a follow up to r230233 to fix something that I noticed by inspection. The AddrModeT2_i8s4 addressing mode does not support negative offsets. I spent a good chunk of the day trying to come up with a testcase for this but was not successful. This addressing mode is used to spill and restore GPRPair registers in Thumb2 code and that does not happen often. We also make very limited used of negative offsets when lowering frame indexes. I am going ahead with the change anyway, because I am pretty confident that it is correct. I also added a missing assertion to check that the low bits of the scaled offset are zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230297 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/Thumb2InstrInfo.cpp | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index 2085bfa9f16..62c37526381 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -575,12 +575,9 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx, } else if (AddrMode == ARMII::AddrModeT2_i8s4) { Offset += MI.getOperand(FrameRegIdx + 1).getImm() * 4; NumBits = 10; // 8 bits scaled by 4 - // MCInst operand has already scaled value. + // MCInst operand expects already scaled value. Scale = 1; - if (Offset < 0) { - isSub = true; - Offset = -Offset; - } + assert((Offset & 3) == 0 && "Can't encode this offset!"); } else { llvm_unreachable("Unsupported addressing mode!"); }