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Floating point stores have a 3rd addressing mode type.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114254 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2010-09-18 01:23:38 +00:00
parent d3dce16ffe
commit b74558ad3e
1 changed files with 9 additions and 1 deletions
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10
lib/Target/ARM/ARMFastISel.cpp
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@ -555,7 +555,6 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg,
assert(VT.isSimple() && "Non-simple types are invalid here!");
unsigned Opc;
switch (VT.getSimpleVT().SimpleTy) {
default:
assert(false && "Trying to emit for an unhandled type!");
@ -637,6 +636,7 @@ bool ARMFastISel::ARMStoreAlloca(const Instruction *I, unsigned SrcReg, EVT VT){
bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg,
unsigned DstReg, int Offset) {
unsigned StrOpc;
bool isFloat = false;
switch (VT.getSimpleVT().SimpleTy) {
default: return false;
case MVT::i1:
@ -646,17 +646,25 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg,
case MVT::f32:
if (!Subtarget->hasVFP2()) return false;
StrOpc = ARM::VSTRS;
isFloat = true;
break;
case MVT::f64:
if (!Subtarget->hasVFP2()) return false;
StrOpc = ARM::VSTRD;
isFloat = true;
break;
}
// The thumb addressing mode has operands swapped from the arm addressing
// mode, the floating point one only has two operands.
if (isThumb)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
.addReg(DstReg).addImm(Offset).addReg(0));
else if (isFloat)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
.addReg(DstReg).addImm(Offset));
else
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)