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Simplify the LiveRangeEdit::canRematerializeAt() interface a bit.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118661 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2010-11-10 01:05:12 +00:00
parent 42c31a7073
commit b80e973c95
3 changed files with 19 additions and 27 deletions
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5
lib/CodeGen/InlineSpiller.cpp
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@@ -167,9 +167,8 @@ bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) {
return true; return true;
} }
LiveRangeEdit::Remat RM = edit_->canRematerializeAt(OrigVNI, UseIdx, false, LiveRangeEdit::Remat RM(OrigVNI);
lis_); if (!edit_->canRematerializeAt(RM, UseIdx, false, lis_)) {
if (!RM) {
usedValues_.insert(OrigVNI); usedValues_.insert(OrigVNI);
DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI); DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI);
return false; return false;

31
lib/CodeGen/LiveRangeEdit.cpp
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@@ -88,36 +88,29 @@ bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
return true; return true;
} }
LiveRangeEdit::Remat LiveRangeEdit::canRematerializeAt(VNInfo *ParentVNI, bool LiveRangeEdit::canRematerializeAt(Remat &RM,
SlotIndex UseIdx, SlotIndex UseIdx,
bool cheapAsAMove, bool cheapAsAMove,
LiveIntervals &lis) { LiveIntervals &lis) {
assert(scannedRemattable_ && "Call anyRematerializable first"); assert(scannedRemattable_ && "Call anyRematerializable first");
Remat RM = { 0, 0 };
// We could remat an undefined value as IMPLICIT_DEF, but all that should have
// been taken care of earlier.
if (!(RM.ParentVNI = parent_.getVNInfoAt(UseIdx)))
return RM;
// Use scanRemattable info. // Use scanRemattable info.
if (!remattable_.count(RM.ParentVNI)) if (!remattable_.count(RM.ParentVNI))
return RM; return false;
// No defining instruction. // No defining instruction.
MachineInstr *OrigMI = lis.getInstructionFromIndex(RM.ParentVNI->def); RM.OrigMI = lis.getInstructionFromIndex(RM.ParentVNI->def);
assert(OrigMI && "Defining instruction for remattable value disappeared"); assert(RM.OrigMI && "Defining instruction for remattable value disappeared");
// If only cheap remats were requested, bail out early. // If only cheap remats were requested, bail out early.
if (cheapAsAMove && !OrigMI->getDesc().isAsCheapAsAMove()) if (cheapAsAMove && !RM.OrigMI->getDesc().isAsCheapAsAMove())
return RM; return false;
// Verify that all used registers are available with the same values. // Verify that all used registers are available with the same values.
if (!allUsesAvailableAt(OrigMI, RM.ParentVNI->def, UseIdx, lis)) if (!allUsesAvailableAt(RM.OrigMI, RM.ParentVNI->def, UseIdx, lis))
return RM; return false;
RM.OrigMI = OrigMI; return true;
return RM;
} }
SlotIndex LiveRangeEdit::rematerializeAt(MachineBasicBlock &MBB, SlotIndex LiveRangeEdit::rematerializeAt(MachineBasicBlock &MBB,

10
lib/CodeGen/LiveRangeEdit.h
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@@ -94,16 +94,16 @@ public:
struct Remat { struct Remat {
VNInfo *ParentVNI; // parent_'s value at the remat location. VNInfo *ParentVNI; // parent_'s value at the remat location.
MachineInstr *OrigMI; // Instruction defining ParentVNI. MachineInstr *OrigMI; // Instruction defining ParentVNI.
operator bool() const { return OrigMI; } explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {}
}; };
/// canRematerializeAt - Determine if ParentVNI can be rematerialized at /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
/// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI. /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
/// When cheapAsAMove is set, only cheap remats are allowed. /// When cheapAsAMove is set, only cheap remats are allowed.
Remat canRematerializeAt(VNInfo *ParentVNI, bool canRematerializeAt(Remat &RM,
SlotIndex UseIdx, SlotIndex UseIdx,
bool cheapAsAMove, bool cheapAsAMove,
LiveIntervals &lis); LiveIntervals &lis);
/// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
/// instruction into MBB before MI. The new instruction is mapped, but /// instruction into MBB before MI. The new instruction is mapped, but