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whitespace/comment changes, no functionality diffs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23283 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -17,7 +17,8 @@ include "PowerPCInstrFormats.td"
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//===----------------------------------------------------------------------===//
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// Selection DAG Type Constraint definitions.
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//
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// Note that the semantics of these constraints are hard coded into tblgen.
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// Note that the semantics of these constraints are hard coded into tblgen. To
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// modify or add constraints, you have to hack tblgen.
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//
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class SDTypeConstraint<int opnum> {
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@ -66,7 +67,9 @@ class SDTypeProfile<int numresults, int numoperands,
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// Builtin profiles.
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def SDTImm : SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
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def SDTVT : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'
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def SDTBinOp : SDTypeProfile<1, 2, [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>]>;
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def SDTBinOp : SDTypeProfile<1, 2, [ // add, mul, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>
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]>;
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def SDTIntBinOp : SDTypeProfile<1, 2, [ // and, or, xor, udiv, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
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]>;
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