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Change argument order and add explanatory comment to r206130
Changes requested in code review by Eric Christopher of r206130. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206219 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -9636,7 +9636,7 @@ static SDValue LowerVectorAllZeroTest(SDValue Op, const X86Subtarget *Subtarget,
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/// Emit nodes that will be selected as "test Op0,Op0", or something
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/// equivalent.
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SDValue X86TargetLowering::EmitTest(SDLoc dl, SDValue Op, unsigned X86CC,
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SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, SDLoc dl,
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SelectionDAG &DAG) const {
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if (Op.getValueType() == MVT::i1)
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// KORTEST instruction should be selected
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@ -9852,11 +9852,11 @@ SDValue X86TargetLowering::EmitTest(SDLoc dl, SDValue Op, unsigned X86CC,
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/// Emit nodes that will be selected as "cmp Op0,Op1", or something
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/// equivalent.
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SDValue X86TargetLowering::EmitCmp(SDLoc dl, SDValue Op0, SDValue Op1,
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unsigned X86CC, SelectionDAG &DAG) const {
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SDValue X86TargetLowering::EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC,
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SDLoc dl, SelectionDAG &DAG) const {
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if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op1)) {
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if (C->getAPIntValue() == 0)
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return EmitTest(dl, Op0, X86CC, DAG);
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return EmitTest(Op0, X86CC, dl, DAG);
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if (Op0.getValueType() == MVT::i1)
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llvm_unreachable("Unexpected comparison operation for MVT::i1 operands");
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@ -10432,7 +10432,7 @@ SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
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if (X86CC == X86::COND_INVALID)
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return SDValue();
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SDValue EFLAGS = EmitCmp(dl, Op0, Op1, X86CC, DAG);
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SDValue EFLAGS = EmitCmp(Op0, Op1, X86CC, dl, DAG);
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EFLAGS = ConvertCmpIfNecessary(EFLAGS, DAG);
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SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
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DAG.getConstant(X86CC, MVT::i8), EFLAGS);
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@ -10655,7 +10655,7 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
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if (addTest) {
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CC = DAG.getConstant(X86::COND_NE, MVT::i8);
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Cond = EmitTest(DL, Cond, X86::COND_NE, DAG);
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Cond = EmitTest(Cond, X86::COND_NE, DL, DAG);
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}
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// a < b ? -1 : 0 -> RES = ~setcc_carry
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@ -11076,7 +11076,7 @@ SDValue X86TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
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if (addTest) {
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CC = DAG.getConstant(X86::COND_NE, MVT::i8);
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Cond = EmitTest(dl, Cond, X86::COND_NE, DAG);
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Cond = EmitTest(Cond, X86::COND_NE, dl, DAG);
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}
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Cond = ConvertCmpIfNecessary(Cond, DAG);
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return DAG.getNode(X86ISD::BRCOND, dl, Op.getValueType(),
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@ -990,12 +990,12 @@ namespace llvm {
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/// Emit nodes that will be selected as "test Op0,Op0", or something
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/// equivalent, for use with the given x86 condition code.
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SDValue EmitTest(SDLoc dl, SDValue Op0, unsigned X86CC,
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SDValue EmitTest(SDValue Op0, unsigned X86CC, SDLoc dl,
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SelectionDAG &DAG) const;
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/// Emit nodes that will be selected as "cmp Op0,Op1", or something
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/// equivalent, for use with the given x86 condition code.
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SDValue EmitCmp(SDLoc dl, SDValue Op0, SDValue Op1, unsigned X86CC,
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SDValue EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC, SDLoc dl,
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SelectionDAG &DAG) const;
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/// Convert a comparison if required by the subtarget.
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@ -16,7 +16,10 @@
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; CHECK: [[F]]: DW_TAG_subprogram
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; CHECK-NEXT: DW_AT_name {{.*}} "f"
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; Make sure the condition test is attributed to the inline function
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; Make sure the condition test is attributed to the inline function, not the
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; location of the test's operands within the caller.
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; ASM: # inline-seldag-test.c:2:0
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; ASM-NOT: .loc
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; ASM: testl
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