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[fast-isel] Add support for returning non-legal types with no sign- or zero-

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entend flag.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150774 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2012-02-17 01:21:28 +00:00
parent 29879d7f86
commit b8703fe265
2 changed files with 15 additions and 6 deletions
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12
lib/Target/ARM/ARMFastISel.cpp
View File

@ -2037,14 +2037,14 @@ bool ARMFastISel::SelectRet(const Instruction *I) {
if (RVVT != MVT::i1 && RVVT != MVT::i8 && RVVT != MVT::i16)
return false;
if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt())
return false;
assert(DestVT == MVT::i32 && "ARM should always ext to i32");
bool isZExt = Outs[0].Flags.isZExt();
SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, isZExt);
if (SrcReg == 0) return false;
// Perform extension if flagged as either zext or sext. Otherwise, do
// nothing.
if (Outs[0].Flags.isZExt() || Outs[0].Flags.isSExt()) {
SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, Outs[0].Flags.isZExt());
if (SrcReg == 0) return false;
}
}
// Make the copy.

9
test/CodeGen/ARM/fast-isel-ret.ll
View File

@ -46,3 +46,12 @@ entry:
; CHECK: bx lr
ret i16 %a
}
define i16 @ret6(i16 %a) nounwind uwtable ssp {
entry:
; CHECK: ret6
; CHECK-NOT: uxth
; CHECK-NOT: sxth
; CHECK: bx lr
ret i16 %a
}