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R600/SI: add shl pattern

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Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177275 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Christian Konig
2013-03-18 11:34:05 +00:00
parent 2d054cb10e
commit b87082228b
3 changed files with 8 additions and 1 deletions
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4
lib/Target/R600/SIISelLowering.cpp
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@@ -229,6 +229,10 @@ EVT SITargetLowering::getSetCCResultType(EVT VT) const {
return MVT::i1; return MVT::i1;
} }
MVT SITargetLowering::getScalarShiftAmountTy(EVT VT) const {
return MVT::i32;
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Custom DAG Lowering Operations // Custom DAG Lowering Operations
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

1
lib/Target/R600/SIISelLowering.h
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@@ -48,6 +48,7 @@ public:
virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr * MI, virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr * MI,
MachineBasicBlock * BB) const; MachineBasicBlock * BB) const;
virtual EVT getSetCCResultType(EVT VT) const; virtual EVT getSetCCResultType(EVT VT) const;
virtual MVT getScalarShiftAmountTy(EVT VT) const;
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const; virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const;

4
lib/Target/R600/SIInstructions.td
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@@ -854,7 +854,9 @@ defm V_LSHR_B32 : VOP2_32 <0x00000015, "V_LSHR_B32", []>;
defm V_LSHRREV_B32 : VOP2_32 <0x00000016, "V_LSHRREV_B32", []>; defm V_LSHRREV_B32 : VOP2_32 <0x00000016, "V_LSHRREV_B32", []>;
defm V_ASHR_I32 : VOP2_32 <0x00000017, "V_ASHR_I32", []>; defm V_ASHR_I32 : VOP2_32 <0x00000017, "V_ASHR_I32", []>;
defm V_ASHRREV_I32 : VOP2_32 <0x00000018, "V_ASHRREV_I32", []>; defm V_ASHRREV_I32 : VOP2_32 <0x00000018, "V_ASHRREV_I32", []>;
defm V_LSHL_B32 : VOP2_32 <0x00000019, "V_LSHL_B32", []>; defm V_LSHL_B32 : VOP2_32 <0x00000019, "V_LSHL_B32",
[(set VReg_32:$dst, (shl VSrc_32:$src0, (i32 VReg_32:$src1)))]
>;
defm V_LSHLREV_B32 : VOP2_32 <0x0000001a, "V_LSHLREV_B32", []>; defm V_LSHLREV_B32 : VOP2_32 <0x0000001a, "V_LSHLREV_B32", []>;
let isCommutable = 1 in { let isCommutable = 1 in {