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Add hasLoadFromStackSlot and hasStoreToStackSlot to return whether a
machine instruction loads or stores from/to a stack slot. Unlike isLoadFromStackSlot and isStoreFromStackSlot, the instruction may be something other than a pure load/store (e.g. it may be an arithmetic operation with a memory operand). This helps AsmPrinter determine when to print a spill/reload comment. This is only a hint since we may not be able to figure this out in all cases. As such, it should not be relied upon for correctness. Implement for X86. Return false by default for other architectures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87026 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -26,11 +26,15 @@
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/PseudoSourceValue.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include <limits>
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using namespace llvm;
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static cl::opt<bool>
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@@ -707,6 +711,21 @@ bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
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}
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}
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/// isFrameOperand - Return true and the FrameIndex if the specified
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/// operand and follow operands form a reference to the stack frame.
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bool X86InstrInfo::isFrameOperand(const MachineInstr *MI, unsigned int Op,
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int &FrameIndex) const {
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if (MI->getOperand(Op).isFI() && MI->getOperand(Op+1).isImm() &&
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MI->getOperand(Op+2).isReg() && MI->getOperand(Op+3).isImm() &&
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MI->getOperand(Op+1).getImm() == 1 &&
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MI->getOperand(Op+2).getReg() == 0 &&
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MI->getOperand(Op+3).getImm() == 0) {
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FrameIndex = MI->getOperand(Op).getIndex();
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return true;
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}
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return false;
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}
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unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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switch (MI->getOpcode()) {
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@@ -723,19 +742,32 @@ unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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case X86::MOVDQArm:
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case X86::MMX_MOVD64rm:
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case X86::MMX_MOVQ64rm:
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if (MI->getOperand(1).isFI() && MI->getOperand(2).isImm() &&
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MI->getOperand(3).isReg() && MI->getOperand(4).isImm() &&
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MI->getOperand(2).getImm() == 1 &&
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MI->getOperand(3).getReg() == 0 &&
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MI->getOperand(4).getImm() == 0) {
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FrameIndex = MI->getOperand(1).getIndex();
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if (isFrameOperand(MI, 1, FrameIndex)) {
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return MI->getOperand(0).getReg();
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}
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// Check for post-frame index elimination operations
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return hasLoadFromStackSlot(MI, FrameIndex);
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break;
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}
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return 0;
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}
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bool X86InstrInfo::hasLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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for (MachineInstr::mmo_iterator o = MI->memoperands_begin(),
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oe = MI->memoperands_end();
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o != oe;
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++o) {
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if ((*o)->isLoad() && (*o)->getValue())
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if (const FixedStackPseudoSourceValue *Value =
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dyn_cast<const FixedStackPseudoSourceValue>((*o)->getValue())) {
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FrameIndex = Value->getFrameIndex();
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return true;
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}
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}
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return false;
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}
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unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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switch (MI->getOpcode()) {
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@@ -753,19 +785,32 @@ unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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case X86::MMX_MOVD64mr:
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case X86::MMX_MOVQ64mr:
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case X86::MMX_MOVNTQmr:
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if (MI->getOperand(0).isFI() && MI->getOperand(1).isImm() &&
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MI->getOperand(2).isReg() && MI->getOperand(3).isImm() &&
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MI->getOperand(1).getImm() == 1 &&
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MI->getOperand(2).getReg() == 0 &&
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MI->getOperand(3).getImm() == 0) {
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FrameIndex = MI->getOperand(0).getIndex();
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if (isFrameOperand(MI, 0, FrameIndex)) {
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return MI->getOperand(X86AddrNumOperands).getReg();
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}
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// Check for post-frame index elimination operations
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return hasStoreToStackSlot(MI, FrameIndex);
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break;
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}
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return 0;
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}
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bool X86InstrInfo::hasStoreToStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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for (MachineInstr::mmo_iterator o = MI->memoperands_begin(),
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oe = MI->memoperands_end();
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o != oe;
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++o) {
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if ((*o)->isStore() && (*o)->getValue())
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if (const FixedStackPseudoSourceValue *Value =
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dyn_cast<const FixedStackPseudoSourceValue>((*o)->getValue())) {
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FrameIndex = Value->getFrameIndex();
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return true;
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}
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}
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return false;
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}
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/// regIsPICBase - Return true if register is PIC base (i.e.g defined by
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/// X86::MOVPC32r.
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static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) {
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