Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class."

Whiny buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106710 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/LiveIntervalAnalysis.h

@@ -133,9 +133,10 @@ namespace llvm {
     bool conflictsWithPhysReg(const LiveInterval &li, VirtRegMap &vrm,
                               unsigned reg);
 
-    /// conflictsWithAliasRef - Similar to conflictsWithPhysRegRef except
-    /// it checks for alias uses and defs.
-    bool conflictsWithAliasRef(LiveInterval &li, unsigned Reg,
+    /// conflictsWithSubPhysRegRef - Similar to conflictsWithPhysRegRef except
+    /// it checks for sub-register reference and it can check use as well.
+    bool conflictsWithSubPhysRegRef(LiveInterval &li, unsigned Reg,
+                                    bool CheckUse,
                                    SmallPtrSet<MachineInstr*,32> &JoinedCopies);
 
     // Interval creation

include/llvm/CodeGen/RegisterCoalescer.h

@@ -165,15 +165,9 @@ namespace llvm {
     /// virtual register.
     unsigned subIdx_;
 
-    /// origDstReg_ - dstReg_ without subreg adjustments.
-    unsigned origDstReg_;
-
     /// partial_ - True when the original copy was a partial subregister copy.
     bool partial_;
 
-    /// crossClass_ - True when both regs are virtual, and newRC is constrained.
-    bool crossClass_;
-
     /// flipped_ - True when DstReg and SrcReg are reversed from the oriignal copy
     /// instruction.
     bool flipped_;
@@ -192,8 +186,7 @@ namespace llvm {
   public:
     CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
       : tii_(tii), tri_(tri), dstReg_(0), srcReg_(0), subIdx_(0),
-        origDstReg_(0), partial_(false), crossClass_(false), flipped_(false),
-        newRC_(0) {}
+        partial_(false), flipped_(false), newRC_(0) {}
 
     /// setRegisters - set registers to match the copy instruction MI. Return
     /// false if MI is not a coalescable copy instruction.
@@ -214,9 +207,6 @@ namespace llvm {
     /// full register, but was a subreg operation.
     bool isPartial() const { return partial_; }
 
-    /// isCrossClass - Return true if DstReg is virtual and NewRC is a smaller register class than DstReg's.
-    bool isCrossClass() const { return crossClass_; }
-
     /// isFlipped - Return true when getSrcReg is the register being defined by
     /// the original copy instruction.
     bool isFlipped() const { return flipped_; }
@@ -232,10 +222,6 @@ namespace llvm {
     /// coalesced into, or 0.
     unsigned getSubIdx() const { return subIdx_; }
 
-    /// getOrigDstReg - Return DstReg as it appeared in the original copy
-    /// instruction before any subreg adjustments.
-    unsigned getOrigDstReg() const { return isPhys() ? origDstReg_ : dstReg_; }
-
     /// getNewRC - Return the register class of the coalesced register.
     const TargetRegisterClass *getNewRC() const { return newRC_; }
   };