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Add Cortex-A53 and Cortex-A57 cores to the AArch64 backend

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201305 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Oliver Stannard 2014-02-13 09:46:11 +00:00
parent 611c2c3804
commit b8c81b50f7
2 changed files with 24 additions and 0 deletions
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11
lib/Target/AArch64/AArch64.td
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@ -36,8 +36,19 @@ def FeatureCrypto : SubtargetFeature<"crypto", "HasCrypto", "true",
include "AArch64Schedule.td"
class ProcNoItin<string Name, list<SubtargetFeature> Features>
: Processor<Name, NoItineraries, Features>;
def : Processor<"generic", GenericItineraries, [FeatureFPARMv8]>;
def : ProcNoItin<"cortex-a53", [FeatureFPARMv8,
FeatureNEON,
FeatureCrypto]>;
def : ProcNoItin<"cortex-a57", [FeatureFPARMv8,
FeatureNEON,
FeatureCrypto]>;
//===----------------------------------------------------------------------===//
// Register File Description
//===----------------------------------------------------------------------===//

13
test/CodeGen/AArch64/cpus.ll Normal file
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@ -0,0 +1,13 @@
; This tests that llc accepts all valid AArch64 CPUs
; RUN: llc < %s -march=aarch64 -mcpu=generic 2>&1 | FileCheck %s
; RUN: llc < %s -march=aarch64 -mcpu=cortex-a53 2>&1 | FileCheck %s
; RUN: llc < %s -march=aarch64 -mcpu=cortex-a57 2>&1 | FileCheck %s
; RUN: llc < %s -march=aarch64 -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
; CHECK-NOT: {{.*}} is not a recognized processor for this target
; INVALID: {{.*}} is not a recognized processor for this target
define i32 @f(i64 %z) {
ret i32 0
}