From b8f7706911028508dc2a6c07fa185139f870c059 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 23 Jun 2009 19:56:37 +0000 Subject: [PATCH] Test instructions operands were printed in the wrong order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73990 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrThumb2.td | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 2196eab1b78..1f5088690ac 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -167,19 +167,19 @@ multiclass T2I_bin_irs { [(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>; } -/// T2I_2bin_is - Same as T2I_bin_irs except the order of operands are reversed. +/// T2I_rbin_is - Same as T2I_bin_irs except the order of operands are reversed. multiclass T2I_rbin_irs { // shifted imm def ri : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_imm:$lhs), - !strconcat(opc, " $dst, $lhs, $rhs"), + !strconcat(opc, " $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode t2_so_imm:$lhs, GPR:$rhs))]>; // register def rr : T2I<(outs GPR:$dst), (ins GPR:$rhs, GPR:$lhs), - !strconcat(opc, " $dst, $lhs, $rhs"), + !strconcat(opc, " $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>; // shifted register def rs : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_reg:$lhs), - !strconcat(opc, " $dst, $lhs, $rhs"), + !strconcat(opc, " $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode t2_so_reg:$lhs, GPR:$rhs))]>; } @@ -208,15 +208,15 @@ let Defs = [CPSR] in { multiclass T2I_rbin_s_irs { // shifted imm def ri : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_imm:$lhs), - !strconcat(opc, "s $dst, $lhs, $rhs"), + !strconcat(opc, "s $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode t2_so_imm:$lhs, GPR:$rhs))]>; // register def rr : T2I<(outs GPR:$dst), (ins GPR:$rhs, GPR:$lhs), - !strconcat(opc, " $dst, $lhs, $rhs"), + !strconcat(opc, " $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>; // shifted register def rs : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_reg:$lhs), - !strconcat(opc, "s $dst, $lhs, $rhs"), + !strconcat(opc, "s $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode t2_so_reg:$lhs, GPR:$rhs))]>; } } @@ -268,15 +268,15 @@ let Uses = [CPSR] in { multiclass T2I_rbin_c_irs { // shifted imm def ri : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_imm:$lhs, cc_out:$s), - !strconcat(opc, "${s} $dst, $lhs, $rhs"), + !strconcat(opc, "${s} $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode t2_so_imm:$lhs, GPR:$rhs))]>; // register def rr : T2I<(outs GPR:$dst), (ins GPR:$rhs, GPR:$lhs, cc_out:$s), - !strconcat(opc, "${s} $dst, $lhs, $rhs"), + !strconcat(opc, "${s} $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>; // shifted register def rs : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_reg:$lhs, cc_out:$s), - !strconcat(opc, "${s} $dst, $lhs, $rhs"), + !strconcat(opc, "${s} $dst, $rhs, $lhs"), [(set GPR:$dst, (opnode t2_so_reg:$lhs, GPR:$rhs))]>; } }