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TableGen: Generate an enum for all named Operand types in tblgen'd InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194978 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -955,6 +955,50 @@ XXXInstrInfo.h:
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int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex);
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} // End namespace XXX
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Instruction Operand Types
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^^^^^^^^^^^^^^^^^^^^^^^^^
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TableGen will also generate an enumeration consisting of all named Operand
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types defined in the backend, in the llvm::XXX::OpTypes namespace.
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Some common immediate Operand types (for instance i8, i32, i64, f32, f64)
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are defined for all targets in ``include/llvm/Target/Target.td``, and are
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available in each Target's OpTypes enum. Also, only named Operand types appear
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in the enumeration: anonymous types are ignored.
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For example, the X86 backend defines ``brtarget`` and ``brtarget8``, both
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instances of the TableGen ``Operand`` class, which represent branch target
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operands:
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.. code-block:: llvm
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def brtarget : Operand<OtherVT>;
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def brtarget8 : Operand<OtherVT>;
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This results in:
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.. code-block:: c++
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namespace X86 {
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namespace OpTypes {
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enum OperandType {
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...
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brtarget,
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brtarget8,
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...
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i32imm,
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i64imm,
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...
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OPERAND_TYPE_LIST_END
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} // End namespace OpTypes
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} // End namespace X86
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In typical TableGen fashion, to use the enum, you will need to define a
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preprocessor macro:
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.. code-block:: c++
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#define GET_INSTRINFO_OPERAND_TYPES_ENUM // For OpTypes enum
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#include "XXXGenInstrInfo.inc"
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Instruction Scheduling
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----------------------
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@ -57,6 +57,7 @@ private:
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std::map<std::vector<Record*>, unsigned> &EL,
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const OperandInfoMapTy &OpInfo,
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raw_ostream &OS);
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void emitOperandTypesEnum(raw_ostream &OS, const CodeGenTarget &Target);
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void initOperandMapData(
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const std::vector<const CodeGenInstruction *> NumberedInstructions,
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const std::string &Namespace,
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@ -311,6 +312,34 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
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}
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/// Generate an enum for all the operand types for this target, under the
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/// llvm::TargetNamespace::OpTypes namespace.
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/// Operand types are all definitions derived of the Operand Target.td class.
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void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS,
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const CodeGenTarget &Target) {
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const std::string &Namespace = Target.getInstNamespace();
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std::vector<Record *> Operands = Records.getAllDerivedDefinitions("Operand");
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OS << "\n#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM\n";
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OS << "#undef GET_INSTRINFO_OPERAND_TYPES_ENUM\n";
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OS << "namespace llvm {";
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OS << "namespace " << Namespace << " {\n";
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OS << "namespace OpTypes { \n";
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OS << "enum OperandType {\n";
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for (unsigned oi = 0, oe = Operands.size(); oi != oe; ++oi) {
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if (!Operands[oi]->isAnonymous())
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OS << " " << Operands[oi]->getName() << " = " << oi << ",\n";
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}
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OS << " OPERAND_TYPE_LIST_END" << "\n};\n";
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OS << "} // End namespace OpTypes\n";
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OS << "} // End namespace " << Namespace << "\n";
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OS << "} // End namespace llvm\n";
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OS << "#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM\n";
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}
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//===----------------------------------------------------------------------===//
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// Main Output.
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//===----------------------------------------------------------------------===//
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@ -432,6 +461,8 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
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OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n";
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emitOperandNameMappings(OS, Target, NumberedInstructions);
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emitOperandTypesEnum(OS, Target);
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}
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void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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