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Support move to/from segment register.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214234 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joerg Sonnenberger
2014-07-29 22:21:57 +00:00
parent f4d90955b6
commit b9253653c7
7 changed files with 70 additions and 0 deletions
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4
test/MC/Disassembler/PowerPC/ppc64-encoding.txt
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@@ -619,3 +619,7 @@
# CHECK: mfocrf 16, 8
0x7e 0x10 0x80 0x26
# CHECK: mtsrin 10, 12
0x7d 0x40 0x61 0xe4
# CHECK: mfsrin 10, 12
0x7d 0x40 0x65 0x26

14
test/MC/PowerPC/ppc64-encoding.s
View File

@@ -767,3 +767,17 @@
# CHECK-LE: mfocrf 16, 8 # encoding: [0x26,0x80,0x10,0x7e]
mfocrf 16, 8
# Move to/from segment register
# CHECK-BE: mtsr 12, 10 # encoding: [0x7d,0x4c,0x01,0xa4]
# CHECK-LE: mtsr 12, 10 # encoding: [0xa4,0x01,0x4c,0x7d]
mtsr 12,%r10
# CHECK-BE: mfsr 10, 12 # encoding: [0x7d,0x4c,0x04,0xa6]
# CHECK-LE: mfsr 10, 12 # encoding: [0xa6,0x04,0x4c,0x7d]
mfsr %r10,12
# CHECK-BE: mtsrin 10, 12 # encoding: [0x7d,0x40,0x61,0xe4]
# CHECK-LE: mtsrin 10, 12 # encoding: [0xe4,0x61,0x40,0x7d]
mtsrin %r10,%r12
# CHECK-BE: mfsrin 10, 12 # encoding: [0x7d,0x40,0x65,0x26]
# CHECK-LE: mfsrin 10, 12 # encoding: [0x26,0x65,0x40,0x7d]
mfsrin %r10,%r12