diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 440219dc9af..61ae9bd608a 100644
--- a/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -245,8 +245,10 @@ static bool translateSrcIndex(MCInst &mcInst, InternalInstruction &insn) {
     baseRegNo = insn.prefixPresent[0x67] ? X86::ESI : X86::RSI;
   else if (insn.mode == MODE_32BIT)
     baseRegNo = insn.prefixPresent[0x67] ? X86::SI : X86::ESI;
-  else if (insn.mode == MODE_16BIT)
+  else {
+    assert(insn.mode == MODE_16BIT);
     baseRegNo = insn.prefixPresent[0x67] ? X86::ESI : X86::SI;
+  }
   MCOperand baseReg = MCOperand::CreateReg(baseRegNo);
   mcInst.addOperand(baseReg);
 
@@ -269,8 +271,10 @@ static bool translateDstIndex(MCInst &mcInst, InternalInstruction &insn) {
     baseRegNo = insn.prefixPresent[0x67] ? X86::EDI : X86::RDI;
   else if (insn.mode == MODE_32BIT)
     baseRegNo = insn.prefixPresent[0x67] ? X86::DI : X86::EDI;
-  else if (insn.mode == MODE_16BIT)
+  else {
+    assert(insn.mode == MODE_16BIT);
     baseRegNo = insn.prefixPresent[0x67] ? X86::EDI : X86::DI;
+  }
   MCOperand baseReg = MCOperand::CreateReg(baseRegNo);
   mcInst.addOperand(baseReg);
   return false;