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[mips][mips64r6] Add Compact indexed jumps.

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Differential Revision: http://reviews.llvm.org/D3707


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208981 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Zoran Jovanovic 2014-05-16 13:19:46 +00:00
parent 0d356ec0ee
commit b95580a711
7 changed files with 85 additions and 2 deletions
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19
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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@ -282,6 +282,25 @@ getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
return 0;
}
/// getJumpOffset16OpValue - Return binary encoding of the jump
/// target operand. If the machine operand requires relocation,
/// record the relocation and return zero.
unsigned MipsMCCodeEmitter::
getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
const MCOperand &MO = MI.getOperand(OpNo);
if (MO.isImm()) return MO.getImm();
assert(MO.isExpr() &&
"getJumpOffset16OpValue expects only expressions or an immediate");
// TODO: Push fixup.
return 0;
}
/// getJumpTargetOpValue - Return binary encoding of the jump
/// target operand. If the machine operand requires relocation,
/// record the relocation and return zero.

7
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
View File

@ -102,6 +102,13 @@ public:
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
// getJumpOffset16OpValue - Return binary encoding of the jump
// offset operand. If the machine operand requires relocation,
// record the relocation and return zero.
unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
// getMachineOpValue - Return binary encoding of operand. If the machin
// operand requires relocation, record the relocation and return zero.
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,

12
lib/Target/Mips/Mips32r6InstrFormats.td
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@ -219,6 +219,18 @@ class CMP_BRANCH_OFF21_FM<bits<6> funct> : MipsR6Inst {
let Inst{20-0} = offset;
}
class JMP_IDX_COMPACT_FM<bits<6> funct> : MipsR6Inst {
bits<5> rt;
bits<16> offset;
bits<32> Inst;
let Inst{31-26} = funct;
let Inst{25-21} = 0b000000;
let Inst{20-16} = rt;
let Inst{15-0} = offset;
}
class BRANCH_OFF26_FM<bits<6> funct> : MipsR6Inst {
bits<32> Inst;
bits<26> offset;

38
lib/Target/Mips/Mips32r6InstrInfo.td
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@ -66,6 +66,16 @@ def brtarget26 : Operand<OtherVT> {
let ParserMatchClass = MipsJumpTargetAsmOperand;
}
def jmpoffset16 : Operand<OtherVT> {
let EncoderMethod = "getJumpOffset16OpValue";
let ParserMatchClass = MipsJumpTargetAsmOperand;
}
def calloffset16 : Operand<iPTR> {
let EncoderMethod = "getJumpOffset16OpValue";
let ParserMatchClass = MipsJumpTargetAsmOperand;
}
//===----------------------------------------------------------------------===//
//
// Instruction Encodings
@ -97,6 +107,9 @@ class BEQZC_ENC : CMP_BRANCH_OFF21_FM<0b110110>;
class BGEZALC_ENC : CMP_BRANCH_OFF16_FM<0b000110>;
class BNEZC_ENC : CMP_BRANCH_OFF21_FM<0b111110>;
class JIALC_ENC : JMP_IDX_COMPACT_FM<0b111110>;
class JIC_ENC : JMP_IDX_COMPACT_FM<0b110110>;
class BITSWAP_ENC : SPECIAL3_2R_FM<OPCODE6_BITSWAP>;
class BLEZALC_ENC : CMP_BRANCH_RT_OFF16_FM<0b000110>;
class DIV_ENC : SPECIAL_3R_FM<0b00010, 0b011010>;
@ -310,6 +323,27 @@ class BGTZC_DESC : CMP_CBR_RT_Z_DESC_BASE<"bgtzc", brtarget, GPR32Opnd>;
class BEQZC_DESC : CMP_CBR_EQNE_Z_DESC_BASE<"beqzc", brtarget21, GPR32Opnd>;
class BNEZC_DESC : CMP_CBR_EQNE_Z_DESC_BASE<"bnezc", brtarget21, GPR32Opnd>;
class JMP_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
RegisterOperand GPROpnd> {
dag InOperandList = (ins GPROpnd:$rt, opnd:$offset);
string AsmString = !strconcat(opstr, "\t$rt, $offset");
list<dag> Pattern = [];
bit isTerminator = 1;
bit hasDelaySlot = 0;
string DecoderMethod = "DecodeSimm16";
}
class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
GPR32Opnd> {
bit isCall = 1;
list<Register> Defs = [RA];
}
class JIC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jic", jmpoffset16, GPR32Opnd> {
bit isBarrier = 1;
list<Register> Defs = [AT];
}
class BITSWAP_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> {
dag OutOperandList = (outs GPROpnd:$rd);
dag InOperandList = (ins GPROpnd:$rt);
@ -469,8 +503,8 @@ defm S : CMP_CC_M<FIELD_CMP_FORMAT_S, "s", FGR32Opnd>;
defm D : CMP_CC_M<FIELD_CMP_FORMAT_D, "d", FGR64Opnd>;
def DIV : DIV_ENC, DIV_DESC, ISA_MIPS32R6;
def DIVU : DIVU_ENC, DIVU_DESC, ISA_MIPS32R6;
def JIALC;
def JIC;
def JIALC : JIALC_ENC, JIALC_DESC, ISA_MIPS32R6;
def JIC : JIC_ENC, JIC_DESC, ISA_MIPS32R6;
// def LSA; // See MSA
def LWPC : LWPC_ENC, LWPC_DESC, ISA_MIPS32R6;
def LWUPC : LWUPC_ENC, LWUPC_DESC, ISA_MIPS32R6;

7
lib/Target/Mips/MipsCodeEmitter.cpp
View File

@ -114,6 +114,7 @@ private:
unsigned OpNo) const;
unsigned getBranchTarget26OpValue(const MachineInstr &MI,
unsigned OpNo) const;
unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const;
unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
@ -220,6 +221,12 @@ unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI,
return 0;
}
unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI,
unsigned OpNo) const {
llvm_unreachable("Unimplemented function.");
return 0;
}
unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
unsigned OpNo) const {
MachineOperand MO = MI.getOperand(OpNo);

2
test/MC/Mips/mips32r6/valid.s
View File

@ -60,6 +60,8 @@
cmp.ngt.d $f2,$f3,$f4 # CHECK: cmp.ngt.d $f2, $f3, $f4 # encoding: [0x46,0xa4,0x18,0x8f]
div $2,$3,$4 # CHECK: div $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9a]
divu $2,$3,$4 # CHECK: divu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9b]
jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0xf8,0x05,0x01,0x00]
jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xd8,0x05,0x01,0x00]
lwpc $2,268 # CHECK: lwpc $2, 268 # encoding: [0xec,0x48,0x00,0x43]
lwupc $2,268 # CHECK: lwupc $2, 268 # encoding: [0xec,0x50,0x00,0x43]
mod $2,$3,$4 # CHECK: mod $2, $3, $4 # encoding: [0x00,0x64,0x10,0xda]

2
test/MC/Mips/mips64r6/valid.s
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@ -65,6 +65,8 @@
dbitswap $4, $2 # CHECK: bitswap $4, $2 # encoding: [0x7c,0x02,0x20,0x24]
div $2,$3,$4 # CHECK: div $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9a]
divu $2,$3,$4 # CHECK: divu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9b]
jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0xf8,0x05,0x01,0x00]
jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xd8,0x05,0x01,0x00]
mod $2,$3,$4 # CHECK: mod $2, $3, $4 # encoding: [0x00,0x64,0x10,0xda]
modu $2,$3,$4 # CHECK: modu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xdb]
ddiv $2,$3,$4 # CHECK: ddiv $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9e]