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Sink codegen optimization level into MCCodeGenInfo along side relocation model

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and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-11-16 08:38:26 +00:00
parent f1b41dd38d
commit b95fc31aa2
46 changed files with 344 additions and 313 deletions
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19
lib/Target/Sparc/SparcTargetMachine.cpp
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@ -27,16 +27,16 @@ extern "C" void LLVMInitializeSparcTarget() {
SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL,
bool is64bit)
: LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
: LLVMTargetMachine(T, TT, CPU, FS, RM, CM, OL),
Subtarget(TT, CPU, FS, is64bit),
DataLayout(Subtarget.getDataLayout()),
TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget),
FrameLowering(Subtarget) {
}
bool SparcTargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
bool SparcTargetMachine::addInstSelector(PassManagerBase &PM) {
PM.add(createSparcISelDag(*this));
return false;
}
@ -44,8 +44,7 @@ bool SparcTargetMachine::addInstSelector(PassManagerBase &PM,
/// addPreEmitPass - This pass may be implemented by targets that want to run
/// passes immediately before machine code is emitted. This should return
/// true if -print-machineinstrs should print out the code after the passes.
bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM,
CodeGenOpt::Level OptLevel){
bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM){
PM.add(createSparcFPMoverPass(*this));
PM.add(createSparcDelaySlotFillerPass(*this));
return true;
@ -54,13 +53,15 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM,
SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
StringRef TT, StringRef CPU,
StringRef FS, Reloc::Model RM,
CodeModel::Model CM)
: SparcTargetMachine(T, TT, CPU, FS, RM, CM, false) {
CodeModel::Model CM,
CodeGenOpt::Level OL)
: SparcTargetMachine(T, TT, CPU, FS, RM, CM, OL, false) {
}
SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
StringRef TT, StringRef CPU,
StringRef FS, Reloc::Model RM,
CodeModel::Model CM)
: SparcTargetMachine(T, TT, CPU, FS, RM, CM, true) {
CodeModel::Model CM,
CodeGenOpt::Level OL)
: SparcTargetMachine(T, TT, CPU, FS, RM, CM, OL, true) {
}