6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-08 06:32:24 +00:00
Code Issues Projects Releases Wiki Activity

reapply my fix for PR8961 with a tweak to properly handle

Browse Source 
multi-instruction sequences like calls.  Many thanks to Jakob for
finding a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123559 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2011-01-16 02:27:38 +00:00
parent d5f656f48b
commit b99fdee325
3 changed files with 30 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -771,8 +771,16 @@ bool SelectionDAGISel::TryToFoldFastISelLoad(const LoadInst *LI,
assert(RI.getOperand().isUse() &&
"The only use of the vreg must be a use, we haven't emitted the def!");
MachineInstr *User = &*RI;
// Set the insertion point properly. Folding the load can cause generation of
// other random instructions (like sign extends) for addressing modes, make
// sure they get inserted in a logical place before the new instruction.
FuncInfo->InsertPt = User;
FuncInfo->MBB = User->getParent();
// Ask the target to try folding the load.
return FastIS->TryToFoldLoad(&*RI, RI.getOperandNo(), LI);
return FastIS->TryToFoldLoad(User, RI.getOperandNo(), LI);
}
#ifndef NDEBUG
@ -890,11 +898,9 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
if (Inst != Begin)
BeforeInst = llvm::prior(llvm::prior(BI));
if (BeforeInst && isa<LoadInst>(BeforeInst) &&
BeforeInst->hasOneUse() && *BeforeInst->use_begin() == Inst) {
FastIS->recomputeInsertPt();
if (TryToFoldFastISelLoad(cast<LoadInst>(BeforeInst), FastIS))
--BI; // If we succeeded, don't re-select the load.
}
BeforeInst->hasOneUse() && *BeforeInst->use_begin() == Inst &&
TryToFoldFastISelLoad(cast<LoadInst>(BeforeInst), FastIS))
--BI; // If we succeeded, don't re-select the load.
continue;
}

2
lib/Target/X86/X86FastISel.cpp
View File

@ -1933,7 +1933,7 @@ bool X86FastISel::TryToFoldLoad(MachineInstr *MI, unsigned OpNo,
XII.foldMemoryOperandImpl(*FuncInfo.MF, MI, OpNo, AddrOps, Size, Alignment);
if (Result == 0) return false;
MI->getParent()->insert(MI, Result);
FuncInfo.MBB->insert(FuncInfo.InsertPt, Result);
MI->eraseFromParent();
return true;
}

17
test/CodeGen/X86/fast-isel-gep.ll
View File

@ -70,3 +70,20 @@ entry:
; X64: test4:
; X64: 128(%r{{.*}},%r{{.*}},8)
}
; PR8961 - Make sure the sext for the GEP addressing comes before the load that
; is folded.
define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind {
%v8 = getelementptr i8* %A, i32 %I
%v9 = bitcast i8* %v8 to i64*
%v10 = load i64* %v9
%v11 = add i64 %B, %v10
ret i64 %v11
; X64: test5:
; X64: movslq %esi, %rax
; X64-NEXT: movq (%rdi,%rax), %rax
; X64-NEXT: addq %rdx, %rax
; X64-NEXT: ret
}