From ba1fc3daf757c8f880c3069eed20218c91f2c3a8 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 28 Apr 2006 04:43:18 +0000 Subject: [PATCH] Mapping of physregs can make it so that the designated and input physregs are the same. In this case, don't emit a noop copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28008 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/VirtRegMap.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index b30c61c8382..f0dd40d1e16 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -611,6 +611,19 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI, Spills, MaybeDeadStores); + // If the mapped designated register is actually the physreg we have + // incoming, we don't need to inserted a dead copy. + if (DesignatedReg == PhysReg) { + // If this stack slot value is already available, reuse it! + DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " + << MRI->getName(PhysReg) << " for vreg" + << VirtReg + << " instead of reloading into same physreg.\n"); + MI.SetMachineOperandReg(i, PhysReg); + ++NumReused; + continue; + } + const TargetRegisterClass* RC = MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);