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Change getISAEncoding to use the target triple to determine
thumb-ness similar to the rest of the Module level asm printing infrastructure as debug info finalization happens after the function may be missing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232875 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -422,7 +422,7 @@ public:
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void emitSectionOffset(const MCSymbol *Label) const;
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/// Get the value for DW_AT_APPLE_isa. Zero if no isa encoding specified.
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virtual unsigned getISAEncoding(const Function *) { return 0; }
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virtual unsigned getISAEncoding() { return 0; }
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/// EmitDwarfRegOp - Emit a dwarf register operation.
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virtual void EmitDwarfRegOp(ByteStreamer &BS,
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@ -1361,9 +1361,8 @@ void DwarfUnit::applySubprogramAttributes(DISubprogram SP, DIE &SPDie,
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if (SP.isOptimized())
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addFlag(SPDie, dwarf::DW_AT_APPLE_optimized);
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if (unsigned isa = Asm->getISAEncoding(SP.getFunction())) {
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if (unsigned isa = Asm->getISAEncoding())
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addUInt(SPDie, dwarf::DW_AT_APPLE_isa, dwarf::DW_FORM_flag, isa);
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}
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if (SP.isLValueReference())
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addFlag(SPDie, dwarf::DW_AT_reference);
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@ -103,13 +103,16 @@ private:
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const MachineInstr *MI);
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public:
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unsigned getISAEncoding(const Function *F) override {
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unsigned getISAEncoding() override {
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// ARM/Darwin adds ISA to the DWARF info for each function.
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Triple TT(TM.getTargetTriple());
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if (!TT.isOSBinFormatMachO())
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return 0;
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const ARMSubtarget &STI = TM.getSubtarget<ARMSubtarget>(*F);
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return STI.isThumb() ? ARM::DW_ISA_ARM_thumb : ARM::DW_ISA_ARM_arm;
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bool isThumb = TT.getArch() == Triple::thumb ||
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TT.getArch() == Triple::thumbeb ||
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TT.getSubArch() == Triple::ARMSubArch_v7m ||
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TT.getSubArch() == Triple::ARMSubArch_v6m;
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return isThumb ? ARM::DW_ISA_ARM_thumb : ARM::DW_ISA_ARM_arm;
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}
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private:
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