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Revert r119109 for now. It's breaking 176.gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119492 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1555,14 +1555,6 @@ ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1,
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return true;
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}
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static MachineMemOperand *CopyMMO(const MachineMemOperand *MMO,
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unsigned NewSize, MachineFunction *MF) {
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return MF->getMachineMemOperand(MachinePointerInfo(MMO->getValue(),
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MMO->getOffset()),
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MMO->getFlags(), NewSize,
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MMO->getAlignment(), MMO->getTBAAInfo());
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}
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bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
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SmallVector<MachineInstr*, 4> &Ops,
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unsigned Base, bool isLd,
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@ -1670,11 +1662,6 @@ bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
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if (!isT2)
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MIB.addReg(0);
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MIB.addImm(Offset).addImm(Pred).addReg(PredReg);
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// Copy memoperands bug change size to 8.
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for (MachineInstr::mmo_iterator mmo = Op0->memoperands_begin();
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mmo != Op0->memoperands_end(); ++mmo)
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MIB.addMemOperand(CopyMMO(*mmo, 8, MF));
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++NumLDRDFormed;
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} else {
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MachineInstrBuilder MIB = BuildMI(*MBB, InsertPos,
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@ -1688,10 +1675,6 @@ bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
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if (!isT2)
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MIB.addReg(0);
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MIB.addImm(Offset).addImm(Pred).addReg(PredReg);
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// Copy memoperands bug change size to 8.
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for (MachineInstr::mmo_iterator mmo = Op0->memoperands_begin();
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mmo != Op0->memoperands_end(); ++mmo)
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MIB.addMemOperand(CopyMMO(*mmo, 8, MF));
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++NumSTRDFormed;
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}
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MBB->erase(Op0);
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