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[ARM] Constrain some register classes in EmitAtomicBinary64 so that
we pass these tests with -verify-machineinstrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189006 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6360,6 +6360,8 @@ ARMTargetLowering::EmitAtomicBinary64(MachineInstr *MI, MachineBasicBlock *BB,
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MRI.constrainRegClass(destlo, &ARM::rGPRRegClass);
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MRI.constrainRegClass(desthi, &ARM::rGPRRegClass);
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MRI.constrainRegClass(ptr, &ARM::rGPRRegClass);
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MRI.constrainRegClass(vallo, &ARM::rGPRRegClass);
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MRI.constrainRegClass(valhi, &ARM::rGPRRegClass);
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}
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MachineBasicBlock *loopMBB = MF->CreateMachineBasicBlock(LLVM_BB);
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@ -6467,6 +6469,8 @@ ARMTargetLowering::EmitAtomicBinary64(MachineInstr *MI, MachineBasicBlock *BB,
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// Store
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if (isThumb2) {
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MRI.constrainRegClass(StoreLo, &ARM::rGPRRegClass);
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MRI.constrainRegClass(StoreHi, &ARM::rGPRRegClass);
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AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2STREXD), storesuccess)
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.addReg(StoreLo).addReg(StoreHi).addReg(ptr));
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} else {
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@ -1,5 +1,5 @@
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; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB
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; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabihf -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-THUMB
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define i64 @test1(i64* %ptr, i64 %val) {
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; CHECK-LABEL: test1:
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@ -1,6 +1,6 @@
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; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s -check-prefix=THUMBTWO
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=THUMBTWO
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; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
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; RUN llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
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