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tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77305 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -505,9 +505,14 @@ void Thumb1RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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// r0 = -imm (this is then translated into a series of instructons)
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// r0 = -imm (this is then translated into a series of instructons)
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// r0 = add r0, sp
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// r0 = add r0, sp
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emitThumbConstant(MBB, II, DestReg, Offset, TII, *this, dl);
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emitThumbConstant(MBB, II, DestReg, Offset, TII, *this, dl);
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MI.setDesc(TII.get(ARM::tADDhirr));
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MI.setDesc(TII.get(ARM::tADDhirr));
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MI.getOperand(i).ChangeToRegister(DestReg, false, false, true);
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MI.getOperand(i).ChangeToRegister(DestReg, false, false, true);
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MI.getOperand(i+1).ChangeToRegister(FrameReg, false);
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MI.getOperand(i+1).ChangeToRegister(FrameReg, false);
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if (Opcode == ARM::tADDi3) {
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MachineInstrBuilder MIB(&MI);
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AddDefaultPred(MIB);
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}
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}
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}
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return;
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return;
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} else {
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} else {
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26
test/CodeGen/Thumb/2009-07-27-PEIAssert.ll
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26
test/CodeGen/Thumb/2009-07-27-PEIAssert.ll
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@ -0,0 +1,26 @@
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; RUN: llvm-as < %s | llc -mtriple=thumbv6-apple-darwin -relocation-model=pic -disable-fp-elim
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%struct.LinkList = type { i32, %struct.LinkList* }
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%struct.List = type { i32, i32* }
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@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @main to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define arm_apcscc i32 @main() nounwind {
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entry:
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%ll = alloca %struct.LinkList*, align 4 ; <%struct.LinkList**> [#uses=1]
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%0 = call arm_apcscc i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind ; <i32> [#uses=1]
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switch i32 %0, label %bb5 [
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i32 7, label %bb4
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i32 42, label %bb3
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]
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bb3: ; preds = %entry
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ret i32 1
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bb4: ; preds = %entry
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ret i32 0
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bb5: ; preds = %entry
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ret i32 1
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}
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declare arm_apcscc i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
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