mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-01 02:33:44 +00:00
Kill off the LoopSplitter. It's not being used or maintained.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145897 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames
parent
80caf9c273
commit
bae56b4c21
@ -135,7 +135,6 @@ void initializeLoopInfoPass(PassRegistry&);
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void initializeLoopInstSimplifyPass(PassRegistry&);
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void initializeLoopInstSimplifyPass(PassRegistry&);
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void initializeLoopRotatePass(PassRegistry&);
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void initializeLoopRotatePass(PassRegistry&);
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void initializeLoopSimplifyPass(PassRegistry&);
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void initializeLoopSimplifyPass(PassRegistry&);
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void initializeLoopSplitterPass(PassRegistry&);
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void initializeLoopStrengthReducePass(PassRegistry&);
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void initializeLoopStrengthReducePass(PassRegistry&);
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void initializeGlobalMergePass(PassRegistry&);
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void initializeGlobalMergePass(PassRegistry&);
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void initializeLoopUnrollPass(PassRegistry&);
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void initializeLoopUnrollPass(PassRegistry&);
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@ -88,7 +88,6 @@ add_llvm_library(LLVMCodeGen
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Spiller.cpp
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Spiller.cpp
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SpillPlacement.cpp
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SpillPlacement.cpp
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SplitKit.cpp
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SplitKit.cpp
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Splitter.cpp
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StackProtector.cpp
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StackProtector.cpp
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StackSlotColoring.cpp
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StackSlotColoring.cpp
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StrongPHIElimination.cpp
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StrongPHIElimination.cpp
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@ -45,7 +45,6 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeRegisterCoalescerPass(Registry);
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initializeRegisterCoalescerPass(Registry);
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initializeRenderMachineFunctionPass(Registry);
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initializeRenderMachineFunctionPass(Registry);
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initializeSlotIndexesPass(Registry);
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initializeSlotIndexesPass(Registry);
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initializeLoopSplitterPass(Registry);
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initializeStackProtectorPass(Registry);
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initializeStackProtectorPass(Registry);
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initializeStackSlotColoringPass(Registry);
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initializeStackSlotColoringPass(Registry);
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initializeStrongPHIEliminationPass(Registry);
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initializeStrongPHIEliminationPass(Registry);
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@ -34,7 +34,6 @@
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#include "LiveRangeEdit.h"
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#include "LiveRangeEdit.h"
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#include "RenderMachineFunction.h"
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#include "RenderMachineFunction.h"
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#include "Spiller.h"
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#include "Spiller.h"
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#include "Splitter.h"
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#include "VirtRegMap.h"
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#include "VirtRegMap.h"
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#include "RegisterCoalescer.h"
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#include "RegisterCoalescer.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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@ -70,11 +69,6 @@ pbqpCoalescing("pbqp-coalescing",
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cl::desc("Attempt coalescing during PBQP register allocation."),
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cl::desc("Attempt coalescing during PBQP register allocation."),
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cl::init(false), cl::Hidden);
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cl::init(false), cl::Hidden);
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static cl::opt<bool>
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pbqpPreSplitting("pbqp-pre-splitting",
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cl::desc("Pre-split before PBQP register allocation."),
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cl::init(false), cl::Hidden);
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namespace {
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namespace {
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///
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///
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@ -95,7 +89,6 @@ public:
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initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
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initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
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initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
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initializeLoopSplitterPass(*PassRegistry::getPassRegistry());
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initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
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initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
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initializeRenderMachineFunctionPass(*PassRegistry::getPassRegistry());
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initializeRenderMachineFunctionPass(*PassRegistry::getPassRegistry());
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}
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}
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@ -463,8 +456,6 @@ void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
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au.addPreserved<MachineDominatorTree>();
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au.addPreserved<MachineDominatorTree>();
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au.addRequired<MachineLoopInfo>();
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au.addRequired<MachineLoopInfo>();
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au.addPreserved<MachineLoopInfo>();
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au.addPreserved<MachineLoopInfo>();
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if (pbqpPreSplitting)
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au.addRequired<LoopSplitter>();
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au.addRequired<VirtRegMap>();
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au.addRequired<VirtRegMap>();
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au.addRequired<RenderMachineFunction>();
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au.addRequired<RenderMachineFunction>();
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MachineFunctionPass::getAnalysisUsage(au);
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MachineFunctionPass::getAnalysisUsage(au);
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@ -1,829 +0,0 @@
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//===-- llvm/CodeGen/Splitter.cpp - Splitter -----------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "loopsplitter"
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#include "Splitter.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/CalcSpillWeights.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/LiveStackAnalysis.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/SlotIndexes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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char LoopSplitter::ID = 0;
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INITIALIZE_PASS_BEGIN(LoopSplitter, "loop-splitting",
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"Split virtual regists across loop boundaries.", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
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INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
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INITIALIZE_PASS_END(LoopSplitter, "loop-splitting",
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"Split virtual regists across loop boundaries.", false, false)
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namespace {
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class StartSlotComparator {
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public:
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StartSlotComparator(LiveIntervals &lis) : lis(lis) {}
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bool operator()(const MachineBasicBlock *mbb1,
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const MachineBasicBlock *mbb2) const {
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return lis.getMBBStartIdx(mbb1) < lis.getMBBStartIdx(mbb2);
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}
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private:
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LiveIntervals &lis;
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};
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}
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namespace llvm {
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class LoopSplit {
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public:
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LoopSplit(LoopSplitter &ls, LiveInterval &li, MachineLoop &loop)
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: ls(ls), li(li), loop(loop), valid(true), inSplit(false), newLI(0) {
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assert(TargetRegisterInfo::isVirtualRegister(li.reg) &&
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"Cannot split physical registers.");
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}
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LiveInterval& getLI() const { return li; }
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MachineLoop& getLoop() const { return loop; }
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bool isValid() const { return valid; }
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bool isWorthwhile() const { return valid && (inSplit || !outSplits.empty()); }
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void invalidate() { valid = false; }
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void splitIncoming() { inSplit = true; }
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void splitOutgoing(MachineLoop::Edge &edge) { outSplits.insert(edge); }
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void addLoopInstr(MachineInstr *i) { loopInstrs.push_back(i); }
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void apply() {
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assert(valid && "Attempt to apply invalid split.");
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applyIncoming();
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applyOutgoing();
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copyRanges();
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renameInside();
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}
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private:
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LoopSplitter &ls;
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LiveInterval &li;
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MachineLoop &loop;
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bool valid, inSplit;
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std::set<MachineLoop::Edge> outSplits;
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std::vector<MachineInstr*> loopInstrs;
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LiveInterval *newLI;
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std::map<VNInfo*, VNInfo*> vniMap;
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LiveInterval* getNewLI() {
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if (newLI == 0) {
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const TargetRegisterClass *trc = ls.mri->getRegClass(li.reg);
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unsigned vreg = ls.mri->createVirtualRegister(trc);
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newLI = &ls.lis->getOrCreateInterval(vreg);
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}
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return newLI;
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}
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VNInfo* getNewVNI(VNInfo *oldVNI) {
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VNInfo *newVNI = vniMap[oldVNI];
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if (newVNI == 0) {
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newVNI = getNewLI()->createValueCopy(oldVNI,
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ls.lis->getVNInfoAllocator());
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vniMap[oldVNI] = newVNI;
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}
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return newVNI;
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}
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void applyIncoming() {
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if (!inSplit) {
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return;
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}
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MachineBasicBlock *preHeader = loop.getLoopPreheader();
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if (preHeader == 0) {
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assert(ls.canInsertPreHeader(loop) &&
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"Can't insert required preheader.");
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preHeader = &ls.insertPreHeader(loop);
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}
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LiveRange *preHeaderRange =
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ls.lis->findExitingRange(li, preHeader);
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assert(preHeaderRange != 0 && "Range not live into preheader.");
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// Insert the new copy.
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MachineInstr *copy = BuildMI(*preHeader,
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preHeader->getFirstTerminator(),
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DebugLoc(),
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ls.tii->get(TargetOpcode::COPY))
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.addReg(getNewLI()->reg, RegState::Define)
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.addReg(li.reg, RegState::Kill);
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ls.lis->InsertMachineInstrInMaps(copy);
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SlotIndex copyDefIdx = ls.lis->getInstructionIndex(copy).getRegSlot();
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VNInfo *newVal = getNewVNI(preHeaderRange->valno);
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newVal->def = copyDefIdx;
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newVal->setCopy(copy);
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li.removeRange(copyDefIdx, ls.lis->getMBBEndIdx(preHeader), true);
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getNewLI()->addRange(LiveRange(copyDefIdx,
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ls.lis->getMBBEndIdx(preHeader),
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newVal));
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}
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void applyOutgoing() {
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for (std::set<MachineLoop::Edge>::iterator osItr = outSplits.begin(),
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osEnd = outSplits.end();
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osItr != osEnd; ++osItr) {
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MachineLoop::Edge edge = *osItr;
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MachineBasicBlock *outBlock = edge.second;
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if (ls.isCriticalEdge(edge)) {
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assert(ls.canSplitEdge(edge) && "Unsplitable critical edge.");
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outBlock = &ls.splitEdge(edge, loop);
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}
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LiveRange *outRange = ls.lis->findEnteringRange(li, outBlock);
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assert(outRange != 0 && "No exiting range?");
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MachineInstr *copy = BuildMI(*outBlock, outBlock->begin(),
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DebugLoc(),
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ls.tii->get(TargetOpcode::COPY))
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.addReg(li.reg, RegState::Define)
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.addReg(getNewLI()->reg, RegState::Kill);
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ls.lis->InsertMachineInstrInMaps(copy);
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SlotIndex copyDefIdx = ls.lis->getInstructionIndex(copy).getRegSlot();
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// Blow away output range definition.
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outRange->valno->def = ls.lis->getInvalidIndex();
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li.removeRange(ls.lis->getMBBStartIdx(outBlock), copyDefIdx);
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SlotIndex newDefIdx = ls.lis->getMBBStartIdx(outBlock);
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assert(ls.lis->getInstructionFromIndex(newDefIdx) == 0 &&
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"PHI def index points at actual instruction.");
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VNInfo *newVal =
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getNewLI()->getNextValue(newDefIdx, 0, ls.lis->getVNInfoAllocator());
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getNewLI()->addRange(LiveRange(ls.lis->getMBBStartIdx(outBlock),
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copyDefIdx, newVal));
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}
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}
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void copyRange(LiveRange &lr) {
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std::pair<bool, LoopSplitter::SlotPair> lsr =
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ls.getLoopSubRange(lr, loop);
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if (!lsr.first)
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return;
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LiveRange loopRange(lsr.second.first, lsr.second.second,
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getNewVNI(lr.valno));
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li.removeRange(loopRange.start, loopRange.end, true);
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getNewLI()->addRange(loopRange);
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}
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void copyRanges() {
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for (std::vector<MachineInstr*>::iterator iItr = loopInstrs.begin(),
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iEnd = loopInstrs.end();
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iItr != iEnd; ++iItr) {
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MachineInstr &instr = **iItr;
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SlotIndex instrIdx = ls.lis->getInstructionIndex(&instr);
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if (instr.modifiesRegister(li.reg, 0)) {
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LiveRange *defRange =
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li.getLiveRangeContaining(instrIdx.getRegSlot());
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if (defRange != 0) // May have caught this already.
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copyRange(*defRange);
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}
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if (instr.readsRegister(li.reg, 0)) {
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LiveRange *useRange =
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li.getLiveRangeContaining(instrIdx.getRegSlot(true));
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if (useRange != 0) { // May have caught this already.
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copyRange(*useRange);
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}
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}
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}
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for (MachineLoop::block_iterator bbItr = loop.block_begin(),
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bbEnd = loop.block_end();
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bbItr != bbEnd; ++bbItr) {
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MachineBasicBlock &loopBlock = **bbItr;
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LiveRange *enteringRange =
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ls.lis->findEnteringRange(li, &loopBlock);
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if (enteringRange != 0) {
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copyRange(*enteringRange);
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}
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}
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}
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void renameInside() {
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for (std::vector<MachineInstr*>::iterator iItr = loopInstrs.begin(),
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iEnd = loopInstrs.end();
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iItr != iEnd; ++iItr) {
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MachineInstr &instr = **iItr;
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for (unsigned i = 0; i < instr.getNumOperands(); ++i) {
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MachineOperand &mop = instr.getOperand(i);
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if (mop.isReg() && mop.getReg() == li.reg) {
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mop.setReg(getNewLI()->reg);
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}
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}
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}
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}
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};
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void LoopSplitter::getAnalysisUsage(AnalysisUsage &au) const {
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au.addRequired<MachineDominatorTree>();
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au.addPreserved<MachineDominatorTree>();
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au.addRequired<MachineLoopInfo>();
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au.addPreserved<MachineLoopInfo>();
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au.addPreservedID(RegisterCoalescerPassID);
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au.addPreserved<CalculateSpillWeights>();
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au.addPreserved<LiveStacks>();
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au.addRequired<SlotIndexes>();
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au.addPreserved<SlotIndexes>();
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au.addRequired<LiveIntervals>();
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au.addPreserved<LiveIntervals>();
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MachineFunctionPass::getAnalysisUsage(au);
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}
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bool LoopSplitter::runOnMachineFunction(MachineFunction &fn) {
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mf = &fn;
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mri = &mf->getRegInfo();
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tii = mf->getTarget().getInstrInfo();
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tri = mf->getTarget().getRegisterInfo();
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sis = &getAnalysis<SlotIndexes>();
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lis = &getAnalysis<LiveIntervals>();
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mli = &getAnalysis<MachineLoopInfo>();
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mdt = &getAnalysis<MachineDominatorTree>();
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fqn = mf->getFunction()->getParent()->getModuleIdentifier() + "." +
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mf->getFunction()->getName().str();
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dbgs() << "Splitting " << mf->getFunction()->getName() << ".";
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|
||||||
dumpOddTerminators();
|
|
||||||
|
|
||||||
// dbgs() << "----------------------------------------\n";
|
|
||||||
// lis->dump();
|
|
||||||
// dbgs() << "----------------------------------------\n";
|
|
||||||
|
|
||||||
// std::deque<MachineLoop*> loops;
|
|
||||||
// std::copy(mli->begin(), mli->end(), std::back_inserter(loops));
|
|
||||||
// dbgs() << "Loops:\n";
|
|
||||||
// while (!loops.empty()) {
|
|
||||||
// MachineLoop &loop = *loops.front();
|
|
||||||
// loops.pop_front();
|
|
||||||
// std::copy(loop.begin(), loop.end(), std::back_inserter(loops));
|
|
||||||
|
|
||||||
// dumpLoopInfo(loop);
|
|
||||||
// }
|
|
||||||
|
|
||||||
//lis->dump();
|
|
||||||
//exit(0);
|
|
||||||
|
|
||||||
// Setup initial intervals.
|
|
||||||
for (LiveIntervals::iterator liItr = lis->begin(), liEnd = lis->end();
|
|
||||||
liItr != liEnd; ++liItr) {
|
|
||||||
LiveInterval *li = liItr->second;
|
|
||||||
|
|
||||||
if (TargetRegisterInfo::isVirtualRegister(li->reg) &&
|
|
||||||
!lis->intervalIsInOneMBB(*li)) {
|
|
||||||
intervals.push_back(li);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
processIntervals();
|
|
||||||
|
|
||||||
intervals.clear();
|
|
||||||
|
|
||||||
// dbgs() << "----------------------------------------\n";
|
|
||||||
// lis->dump();
|
|
||||||
// dbgs() << "----------------------------------------\n";
|
|
||||||
|
|
||||||
dumpOddTerminators();
|
|
||||||
|
|
||||||
//exit(1);
|
|
||||||
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::releaseMemory() {
|
|
||||||
fqn.clear();
|
|
||||||
intervals.clear();
|
|
||||||
loopRangeMap.clear();
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::dumpOddTerminators() {
|
|
||||||
for (MachineFunction::iterator bbItr = mf->begin(), bbEnd = mf->end();
|
|
||||||
bbItr != bbEnd; ++bbItr) {
|
|
||||||
MachineBasicBlock *mbb = &*bbItr;
|
|
||||||
MachineBasicBlock *a = 0, *b = 0;
|
|
||||||
SmallVector<MachineOperand, 4> c;
|
|
||||||
if (tii->AnalyzeBranch(*mbb, a, b, c)) {
|
|
||||||
dbgs() << "MBB#" << mbb->getNumber() << " has multiway terminator.\n";
|
|
||||||
dbgs() << " Terminators:\n";
|
|
||||||
for (MachineBasicBlock::iterator iItr = mbb->begin(), iEnd = mbb->end();
|
|
||||||
iItr != iEnd; ++iItr) {
|
|
||||||
MachineInstr *instr= &*iItr;
|
|
||||||
dbgs() << " " << *instr << "";
|
|
||||||
}
|
|
||||||
dbgs() << "\n Listed successors: [ ";
|
|
||||||
for (MachineBasicBlock::succ_iterator sItr = mbb->succ_begin(), sEnd = mbb->succ_end();
|
|
||||||
sItr != sEnd; ++sItr) {
|
|
||||||
MachineBasicBlock *succMBB = *sItr;
|
|
||||||
dbgs() << succMBB->getNumber() << " ";
|
|
||||||
}
|
|
||||||
dbgs() << "]\n\n";
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::dumpLoopInfo(MachineLoop &loop) {
|
|
||||||
MachineBasicBlock &headerBlock = *loop.getHeader();
|
|
||||||
typedef SmallVector<MachineLoop::Edge, 8> ExitEdgesList;
|
|
||||||
ExitEdgesList exitEdges;
|
|
||||||
loop.getExitEdges(exitEdges);
|
|
||||||
|
|
||||||
dbgs() << " Header: BB#" << headerBlock.getNumber() << ", Contains: [ ";
|
|
||||||
for (std::vector<MachineBasicBlock*>::const_iterator
|
|
||||||
subBlockItr = loop.getBlocks().begin(),
|
|
||||||
subBlockEnd = loop.getBlocks().end();
|
|
||||||
subBlockItr != subBlockEnd; ++subBlockItr) {
|
|
||||||
MachineBasicBlock &subBlock = **subBlockItr;
|
|
||||||
dbgs() << "BB#" << subBlock.getNumber() << " ";
|
|
||||||
}
|
|
||||||
dbgs() << "], Exit edges: [ ";
|
|
||||||
for (ExitEdgesList::iterator exitEdgeItr = exitEdges.begin(),
|
|
||||||
exitEdgeEnd = exitEdges.end();
|
|
||||||
exitEdgeItr != exitEdgeEnd; ++exitEdgeItr) {
|
|
||||||
MachineLoop::Edge &exitEdge = *exitEdgeItr;
|
|
||||||
dbgs() << "(MBB#" << exitEdge.first->getNumber()
|
|
||||||
<< ", MBB#" << exitEdge.second->getNumber() << ") ";
|
|
||||||
}
|
|
||||||
dbgs() << "], Sub-Loop Headers: [ ";
|
|
||||||
for (MachineLoop::iterator subLoopItr = loop.begin(),
|
|
||||||
subLoopEnd = loop.end();
|
|
||||||
subLoopItr != subLoopEnd; ++subLoopItr) {
|
|
||||||
MachineLoop &subLoop = **subLoopItr;
|
|
||||||
MachineBasicBlock &subLoopBlock = *subLoop.getHeader();
|
|
||||||
dbgs() << "BB#" << subLoopBlock.getNumber() << " ";
|
|
||||||
}
|
|
||||||
dbgs() << "]\n";
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::updateTerminators(MachineBasicBlock &mbb) {
|
|
||||||
mbb.updateTerminator();
|
|
||||||
|
|
||||||
for (MachineBasicBlock::iterator miItr = mbb.begin(), miEnd = mbb.end();
|
|
||||||
miItr != miEnd; ++miItr) {
|
|
||||||
if (lis->isNotInMIMap(miItr)) {
|
|
||||||
lis->InsertMachineInstrInMaps(miItr);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
bool LoopSplitter::canInsertPreHeader(MachineLoop &loop) {
|
|
||||||
MachineBasicBlock *header = loop.getHeader();
|
|
||||||
MachineBasicBlock *a = 0, *b = 0;
|
|
||||||
SmallVector<MachineOperand, 4> c;
|
|
||||||
|
|
||||||
for (MachineBasicBlock::pred_iterator pbItr = header->pred_begin(),
|
|
||||||
pbEnd = header->pred_end();
|
|
||||||
pbItr != pbEnd; ++pbItr) {
|
|
||||||
MachineBasicBlock *predBlock = *pbItr;
|
|
||||||
if (!!tii->AnalyzeBranch(*predBlock, a, b, c)) {
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
MachineFunction::iterator headerItr(header);
|
|
||||||
if (headerItr == mf->begin())
|
|
||||||
return true;
|
|
||||||
MachineBasicBlock *headerLayoutPred = llvm::prior(headerItr);
|
|
||||||
assert(headerLayoutPred != 0 && "Header should have layout pred.");
|
|
||||||
|
|
||||||
return (!tii->AnalyzeBranch(*headerLayoutPred, a, b, c));
|
|
||||||
}
|
|
||||||
|
|
||||||
MachineBasicBlock& LoopSplitter::insertPreHeader(MachineLoop &loop) {
|
|
||||||
assert(loop.getLoopPreheader() == 0 && "Loop already has preheader.");
|
|
||||||
|
|
||||||
MachineBasicBlock &header = *loop.getHeader();
|
|
||||||
|
|
||||||
// Save the preds - we'll need to update them once we insert the preheader.
|
|
||||||
typedef std::set<MachineBasicBlock*> HeaderPreds;
|
|
||||||
HeaderPreds headerPreds;
|
|
||||||
|
|
||||||
for (MachineBasicBlock::pred_iterator predItr = header.pred_begin(),
|
|
||||||
predEnd = header.pred_end();
|
|
||||||
predItr != predEnd; ++predItr) {
|
|
||||||
if (!loop.contains(*predItr))
|
|
||||||
headerPreds.insert(*predItr);
|
|
||||||
}
|
|
||||||
|
|
||||||
assert(!headerPreds.empty() && "No predecessors for header?");
|
|
||||||
|
|
||||||
//dbgs() << fqn << " MBB#" << header.getNumber() << " inserting preheader...";
|
|
||||||
|
|
||||||
MachineBasicBlock *preHeader =
|
|
||||||
mf->CreateMachineBasicBlock(header.getBasicBlock());
|
|
||||||
|
|
||||||
assert(preHeader != 0 && "Failed to create pre-header.");
|
|
||||||
|
|
||||||
mf->insert(header, preHeader);
|
|
||||||
|
|
||||||
for (HeaderPreds::iterator hpItr = headerPreds.begin(),
|
|
||||||
hpEnd = headerPreds.end();
|
|
||||||
hpItr != hpEnd; ++hpItr) {
|
|
||||||
assert(*hpItr != 0 && "How'd a null predecessor get into this set?");
|
|
||||||
MachineBasicBlock &hp = **hpItr;
|
|
||||||
hp.ReplaceUsesOfBlockWith(&header, preHeader);
|
|
||||||
}
|
|
||||||
preHeader->addSuccessor(&header);
|
|
||||||
|
|
||||||
MachineBasicBlock *oldLayoutPred =
|
|
||||||
llvm::prior(MachineFunction::iterator(preHeader));
|
|
||||||
if (oldLayoutPred != 0) {
|
|
||||||
updateTerminators(*oldLayoutPred);
|
|
||||||
}
|
|
||||||
|
|
||||||
lis->InsertMBBInMaps(preHeader);
|
|
||||||
|
|
||||||
if (MachineLoop *parentLoop = loop.getParentLoop()) {
|
|
||||||
assert(parentLoop->getHeader() != loop.getHeader() &&
|
|
||||||
"Parent loop has same header?");
|
|
||||||
parentLoop->addBasicBlockToLoop(preHeader, mli->getBase());
|
|
||||||
|
|
||||||
// Invalidate all parent loop ranges.
|
|
||||||
while (parentLoop != 0) {
|
|
||||||
loopRangeMap.erase(parentLoop);
|
|
||||||
parentLoop = parentLoop->getParentLoop();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
for (LiveIntervals::iterator liItr = lis->begin(),
|
|
||||||
liEnd = lis->end();
|
|
||||||
liItr != liEnd; ++liItr) {
|
|
||||||
LiveInterval &li = *liItr->second;
|
|
||||||
|
|
||||||
// Is this safe for physregs?
|
|
||||||
// TargetRegisterInfo::isPhysicalRegister(li.reg) ||
|
|
||||||
if (!lis->isLiveInToMBB(li, &header))
|
|
||||||
continue;
|
|
||||||
|
|
||||||
if (lis->isLiveInToMBB(li, preHeader)) {
|
|
||||||
assert(lis->isLiveOutOfMBB(li, preHeader) &&
|
|
||||||
"Range terminates in newly added preheader?");
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool insertRange = false;
|
|
||||||
|
|
||||||
for (MachineBasicBlock::pred_iterator predItr = preHeader->pred_begin(),
|
|
||||||
predEnd = preHeader->pred_end();
|
|
||||||
predItr != predEnd; ++predItr) {
|
|
||||||
MachineBasicBlock *predMBB = *predItr;
|
|
||||||
if (lis->isLiveOutOfMBB(li, predMBB)) {
|
|
||||||
insertRange = true;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!insertRange)
|
|
||||||
continue;
|
|
||||||
|
|
||||||
SlotIndex newDefIdx = lis->getMBBStartIdx(preHeader);
|
|
||||||
assert(lis->getInstructionFromIndex(newDefIdx) == 0 &&
|
|
||||||
"PHI def index points at actual instruction.");
|
|
||||||
VNInfo *newVal = li.getNextValue(newDefIdx, 0, lis->getVNInfoAllocator());
|
|
||||||
li.addRange(LiveRange(lis->getMBBStartIdx(preHeader),
|
|
||||||
lis->getMBBEndIdx(preHeader),
|
|
||||||
newVal));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
//dbgs() << "Dumping SlotIndexes:\n";
|
|
||||||
//sis->dump();
|
|
||||||
|
|
||||||
//dbgs() << "done. (Added MBB#" << preHeader->getNumber() << ")\n";
|
|
||||||
|
|
||||||
return *preHeader;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool LoopSplitter::isCriticalEdge(MachineLoop::Edge &edge) {
|
|
||||||
assert(edge.first->succ_size() > 1 && "Non-sensical edge.");
|
|
||||||
if (edge.second->pred_size() > 1)
|
|
||||||
return true;
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool LoopSplitter::canSplitEdge(MachineLoop::Edge &edge) {
|
|
||||||
MachineFunction::iterator outBlockItr(edge.second);
|
|
||||||
if (outBlockItr == mf->begin())
|
|
||||||
return true;
|
|
||||||
MachineBasicBlock *outBlockLayoutPred = llvm::prior(outBlockItr);
|
|
||||||
assert(outBlockLayoutPred != 0 && "Should have a layout pred if out!=begin.");
|
|
||||||
MachineBasicBlock *a = 0, *b = 0;
|
|
||||||
SmallVector<MachineOperand, 4> c;
|
|
||||||
return (!tii->AnalyzeBranch(*outBlockLayoutPred, a, b, c) &&
|
|
||||||
!tii->AnalyzeBranch(*edge.first, a, b, c));
|
|
||||||
}
|
|
||||||
|
|
||||||
MachineBasicBlock& LoopSplitter::splitEdge(MachineLoop::Edge &edge,
|
|
||||||
MachineLoop &loop) {
|
|
||||||
|
|
||||||
MachineBasicBlock &inBlock = *edge.first;
|
|
||||||
MachineBasicBlock &outBlock = *edge.second;
|
|
||||||
|
|
||||||
assert((inBlock.succ_size() > 1) && (outBlock.pred_size() > 1) &&
|
|
||||||
"Splitting non-critical edge?");
|
|
||||||
|
|
||||||
//dbgs() << fqn << " Splitting edge (MBB#" << inBlock.getNumber()
|
|
||||||
// << " -> MBB#" << outBlock.getNumber() << ")...";
|
|
||||||
|
|
||||||
MachineBasicBlock *splitBlock =
|
|
||||||
mf->CreateMachineBasicBlock();
|
|
||||||
|
|
||||||
assert(splitBlock != 0 && "Failed to create split block.");
|
|
||||||
|
|
||||||
mf->insert(&outBlock, splitBlock);
|
|
||||||
|
|
||||||
inBlock.ReplaceUsesOfBlockWith(&outBlock, splitBlock);
|
|
||||||
splitBlock->addSuccessor(&outBlock);
|
|
||||||
|
|
||||||
MachineBasicBlock *oldLayoutPred =
|
|
||||||
llvm::prior(MachineFunction::iterator(splitBlock));
|
|
||||||
if (oldLayoutPred != 0) {
|
|
||||||
updateTerminators(*oldLayoutPred);
|
|
||||||
}
|
|
||||||
|
|
||||||
lis->InsertMBBInMaps(splitBlock);
|
|
||||||
|
|
||||||
loopRangeMap.erase(&loop);
|
|
||||||
|
|
||||||
MachineLoop *splitParentLoop = loop.getParentLoop();
|
|
||||||
while (splitParentLoop != 0 &&
|
|
||||||
!splitParentLoop->contains(&outBlock)) {
|
|
||||||
splitParentLoop = splitParentLoop->getParentLoop();
|
|
||||||
}
|
|
||||||
|
|
||||||
if (splitParentLoop != 0) {
|
|
||||||
assert(splitParentLoop->contains(&loop) &&
|
|
||||||
"Split-block parent doesn't contain original loop?");
|
|
||||||
splitParentLoop->addBasicBlockToLoop(splitBlock, mli->getBase());
|
|
||||||
|
|
||||||
// Invalidate all parent loop ranges.
|
|
||||||
while (splitParentLoop != 0) {
|
|
||||||
loopRangeMap.erase(splitParentLoop);
|
|
||||||
splitParentLoop = splitParentLoop->getParentLoop();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
for (LiveIntervals::iterator liItr = lis->begin(),
|
|
||||||
liEnd = lis->end();
|
|
||||||
liItr != liEnd; ++liItr) {
|
|
||||||
LiveInterval &li = *liItr->second;
|
|
||||||
bool intersects = lis->isLiveOutOfMBB(li, &inBlock) &&
|
|
||||||
lis->isLiveInToMBB(li, &outBlock);
|
|
||||||
if (lis->isLiveInToMBB(li, splitBlock)) {
|
|
||||||
if (!intersects) {
|
|
||||||
li.removeRange(lis->getMBBStartIdx(splitBlock),
|
|
||||||
lis->getMBBEndIdx(splitBlock), true);
|
|
||||||
}
|
|
||||||
} else if (intersects) {
|
|
||||||
SlotIndex newDefIdx = lis->getMBBStartIdx(splitBlock);
|
|
||||||
assert(lis->getInstructionFromIndex(newDefIdx) == 0 &&
|
|
||||||
"PHI def index points at actual instruction.");
|
|
||||||
VNInfo *newVal = li.getNextValue(newDefIdx, 0,
|
|
||||||
lis->getVNInfoAllocator());
|
|
||||||
li.addRange(LiveRange(lis->getMBBStartIdx(splitBlock),
|
|
||||||
lis->getMBBEndIdx(splitBlock),
|
|
||||||
newVal));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
//dbgs() << "done. (Added MBB#" << splitBlock->getNumber() << ")\n";
|
|
||||||
|
|
||||||
return *splitBlock;
|
|
||||||
}
|
|
||||||
|
|
||||||
LoopSplitter::LoopRanges& LoopSplitter::getLoopRanges(MachineLoop &loop) {
|
|
||||||
typedef std::set<MachineBasicBlock*, StartSlotComparator> LoopMBBSet;
|
|
||||||
LoopRangeMap::iterator lrItr = loopRangeMap.find(&loop);
|
|
||||||
if (lrItr == loopRangeMap.end()) {
|
|
||||||
LoopMBBSet loopMBBs((StartSlotComparator(*lis)));
|
|
||||||
std::copy(loop.block_begin(), loop.block_end(),
|
|
||||||
std::inserter(loopMBBs, loopMBBs.begin()));
|
|
||||||
|
|
||||||
assert(!loopMBBs.empty() && "No blocks in loop?");
|
|
||||||
|
|
||||||
LoopRanges &loopRanges = loopRangeMap[&loop];
|
|
||||||
assert(loopRanges.empty() && "Loop encountered but not processed?");
|
|
||||||
SlotIndex oldEnd = lis->getMBBEndIdx(*loopMBBs.begin());
|
|
||||||
loopRanges.push_back(
|
|
||||||
std::make_pair(lis->getMBBStartIdx(*loopMBBs.begin()),
|
|
||||||
lis->getInvalidIndex()));
|
|
||||||
for (LoopMBBSet::iterator curBlockItr = llvm::next(loopMBBs.begin()),
|
|
||||||
curBlockEnd = loopMBBs.end();
|
|
||||||
curBlockItr != curBlockEnd; ++curBlockItr) {
|
|
||||||
SlotIndex newStart = lis->getMBBStartIdx(*curBlockItr);
|
|
||||||
if (newStart != oldEnd) {
|
|
||||||
loopRanges.back().second = oldEnd;
|
|
||||||
loopRanges.push_back(std::make_pair(newStart,
|
|
||||||
lis->getInvalidIndex()));
|
|
||||||
}
|
|
||||||
oldEnd = lis->getMBBEndIdx(*curBlockItr);
|
|
||||||
}
|
|
||||||
|
|
||||||
loopRanges.back().second =
|
|
||||||
lis->getMBBEndIdx(*llvm::prior(loopMBBs.end()));
|
|
||||||
|
|
||||||
return loopRanges;
|
|
||||||
}
|
|
||||||
return lrItr->second;
|
|
||||||
}
|
|
||||||
|
|
||||||
std::pair<bool, LoopSplitter::SlotPair> LoopSplitter::getLoopSubRange(
|
|
||||||
const LiveRange &lr,
|
|
||||||
MachineLoop &loop) {
|
|
||||||
LoopRanges &loopRanges = getLoopRanges(loop);
|
|
||||||
LoopRanges::iterator lrItr = loopRanges.begin(),
|
|
||||||
lrEnd = loopRanges.end();
|
|
||||||
while (lrItr != lrEnd && lr.start >= lrItr->second) {
|
|
||||||
++lrItr;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (lrItr == lrEnd) {
|
|
||||||
SlotIndex invalid = lis->getInvalidIndex();
|
|
||||||
return std::make_pair(false, SlotPair(invalid, invalid));
|
|
||||||
}
|
|
||||||
|
|
||||||
SlotIndex srStart(lr.start < lrItr->first ? lrItr->first : lr.start);
|
|
||||||
SlotIndex srEnd(lr.end > lrItr->second ? lrItr->second : lr.end);
|
|
||||||
|
|
||||||
return std::make_pair(true, SlotPair(srStart, srEnd));
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::dumpLoopRanges(MachineLoop &loop) {
|
|
||||||
LoopRanges &loopRanges = getLoopRanges(loop);
|
|
||||||
dbgs() << "For loop MBB#" << loop.getHeader()->getNumber() << ", subranges are: [ ";
|
|
||||||
for (LoopRanges::iterator lrItr = loopRanges.begin(), lrEnd = loopRanges.end();
|
|
||||||
lrItr != lrEnd; ++lrItr) {
|
|
||||||
dbgs() << "[" << lrItr->first << ", " << lrItr->second << ") ";
|
|
||||||
}
|
|
||||||
dbgs() << "]\n";
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::processHeader(LoopSplit &split) {
|
|
||||||
MachineBasicBlock &header = *split.getLoop().getHeader();
|
|
||||||
//dbgs() << " Processing loop header BB#" << header.getNumber() << "\n";
|
|
||||||
|
|
||||||
if (!lis->isLiveInToMBB(split.getLI(), &header))
|
|
||||||
return; // Not live in, but nothing wrong so far.
|
|
||||||
|
|
||||||
MachineBasicBlock *preHeader = split.getLoop().getLoopPreheader();
|
|
||||||
if (!preHeader) {
|
|
||||||
|
|
||||||
if (!canInsertPreHeader(split.getLoop())) {
|
|
||||||
split.invalidate();
|
|
||||||
return; // Couldn't insert a pre-header. Bail on this interval.
|
|
||||||
}
|
|
||||||
|
|
||||||
for (MachineBasicBlock::pred_iterator predItr = header.pred_begin(),
|
|
||||||
predEnd = header.pred_end();
|
|
||||||
predItr != predEnd; ++predItr) {
|
|
||||||
if (lis->isLiveOutOfMBB(split.getLI(), *predItr)) {
|
|
||||||
split.splitIncoming();
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
} else if (lis->isLiveOutOfMBB(split.getLI(), preHeader)) {
|
|
||||||
split.splitIncoming();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::processLoopExits(LoopSplit &split) {
|
|
||||||
typedef SmallVector<MachineLoop::Edge, 8> ExitEdgesList;
|
|
||||||
ExitEdgesList exitEdges;
|
|
||||||
split.getLoop().getExitEdges(exitEdges);
|
|
||||||
|
|
||||||
//dbgs() << " Processing loop exits:\n";
|
|
||||||
|
|
||||||
for (ExitEdgesList::iterator exitEdgeItr = exitEdges.begin(),
|
|
||||||
exitEdgeEnd = exitEdges.end();
|
|
||||||
exitEdgeItr != exitEdgeEnd; ++exitEdgeItr) {
|
|
||||||
MachineLoop::Edge exitEdge = *exitEdgeItr;
|
|
||||||
|
|
||||||
LiveRange *outRange =
|
|
||||||
split.getLI().getLiveRangeContaining(lis->getMBBStartIdx(exitEdge.second));
|
|
||||||
|
|
||||||
if (outRange != 0) {
|
|
||||||
if (isCriticalEdge(exitEdge) && !canSplitEdge(exitEdge)) {
|
|
||||||
split.invalidate();
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
split.splitOutgoing(exitEdge);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::processLoopUses(LoopSplit &split) {
|
|
||||||
std::set<MachineInstr*> processed;
|
|
||||||
|
|
||||||
for (MachineRegisterInfo::reg_iterator
|
|
||||||
rItr = mri->reg_begin(split.getLI().reg),
|
|
||||||
rEnd = mri->reg_end();
|
|
||||||
rItr != rEnd; ++rItr) {
|
|
||||||
MachineInstr &instr = *rItr;
|
|
||||||
if (split.getLoop().contains(&instr) && processed.count(&instr) == 0) {
|
|
||||||
split.addLoopInstr(&instr);
|
|
||||||
processed.insert(&instr);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
//dbgs() << " Rewriting reg" << li.reg << " to reg" << newLI->reg
|
|
||||||
// << " in blocks [ ";
|
|
||||||
//dbgs() << "]\n";
|
|
||||||
}
|
|
||||||
|
|
||||||
bool LoopSplitter::splitOverLoop(LiveInterval &li, MachineLoop &loop) {
|
|
||||||
assert(TargetRegisterInfo::isVirtualRegister(li.reg) &&
|
|
||||||
"Attempt to split physical register.");
|
|
||||||
|
|
||||||
LoopSplit split(*this, li, loop);
|
|
||||||
processHeader(split);
|
|
||||||
if (split.isValid())
|
|
||||||
processLoopExits(split);
|
|
||||||
if (split.isValid())
|
|
||||||
processLoopUses(split);
|
|
||||||
if (split.isValid() /* && split.isWorthwhile() */) {
|
|
||||||
split.apply();
|
|
||||||
DEBUG(dbgs() << "Success.\n");
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
DEBUG(dbgs() << "Failed.\n");
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::processInterval(LiveInterval &li) {
|
|
||||||
std::deque<MachineLoop*> loops;
|
|
||||||
std::copy(mli->begin(), mli->end(), std::back_inserter(loops));
|
|
||||||
|
|
||||||
while (!loops.empty()) {
|
|
||||||
MachineLoop &loop = *loops.front();
|
|
||||||
loops.pop_front();
|
|
||||||
DEBUG(
|
|
||||||
dbgs() << fqn << " reg" << li.reg << " " << li.weight << " BB#"
|
|
||||||
<< loop.getHeader()->getNumber() << " ";
|
|
||||||
);
|
|
||||||
if (!splitOverLoop(li, loop)) {
|
|
||||||
// Couldn't split over outer loop, schedule sub-loops to be checked.
|
|
||||||
std::copy(loop.begin(), loop.end(), std::back_inserter(loops));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void LoopSplitter::processIntervals() {
|
|
||||||
while (!intervals.empty()) {
|
|
||||||
LiveInterval &li = *intervals.front();
|
|
||||||
intervals.pop_front();
|
|
||||||
|
|
||||||
assert(!lis->intervalIsInOneMBB(li) &&
|
|
||||||
"Single interval in process worklist.");
|
|
||||||
|
|
||||||
processInterval(li);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
@ -1,101 +0,0 @@
|
|||||||
//===-- llvm/CodeGen/Splitter.h - Splitter -*- C++ -*----------------------===//
|
|
||||||
//
|
|
||||||
// The LLVM Compiler Infrastructure
|
|
||||||
//
|
|
||||||
// This file is distributed under the University of Illinois Open Source
|
|
||||||
// License. See LICENSE.TXT for details.
|
|
||||||
//
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
|
|
||||||
#ifndef LLVM_CODEGEN_SPLITTER_H
|
|
||||||
#define LLVM_CODEGEN_SPLITTER_H
|
|
||||||
|
|
||||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
|
||||||
#include "llvm/CodeGen/MachineLoopInfo.h"
|
|
||||||
#include "llvm/CodeGen/SlotIndexes.h"
|
|
||||||
|
|
||||||
#include <deque>
|
|
||||||
#include <map>
|
|
||||||
#include <string>
|
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
|
|
||||||
class LiveInterval;
|
|
||||||
class LiveIntervals;
|
|
||||||
struct LiveRange;
|
|
||||||
class LoopSplit;
|
|
||||||
class MachineDominatorTree;
|
|
||||||
class MachineRegisterInfo;
|
|
||||||
class SlotIndexes;
|
|
||||||
class TargetInstrInfo;
|
|
||||||
class VNInfo;
|
|
||||||
|
|
||||||
class LoopSplitter : public MachineFunctionPass {
|
|
||||||
friend class LoopSplit;
|
|
||||||
public:
|
|
||||||
static char ID;
|
|
||||||
|
|
||||||
LoopSplitter() : MachineFunctionPass(ID) {
|
|
||||||
initializeLoopSplitterPass(*PassRegistry::getPassRegistry());
|
|
||||||
}
|
|
||||||
|
|
||||||
virtual void getAnalysisUsage(AnalysisUsage &au) const;
|
|
||||||
|
|
||||||
virtual bool runOnMachineFunction(MachineFunction &fn);
|
|
||||||
|
|
||||||
virtual void releaseMemory();
|
|
||||||
|
|
||||||
|
|
||||||
private:
|
|
||||||
|
|
||||||
MachineFunction *mf;
|
|
||||||
LiveIntervals *lis;
|
|
||||||
MachineLoopInfo *mli;
|
|
||||||
MachineRegisterInfo *mri;
|
|
||||||
MachineDominatorTree *mdt;
|
|
||||||
SlotIndexes *sis;
|
|
||||||
const TargetInstrInfo *tii;
|
|
||||||
const TargetRegisterInfo *tri;
|
|
||||||
|
|
||||||
std::string fqn;
|
|
||||||
std::deque<LiveInterval*> intervals;
|
|
||||||
|
|
||||||
typedef std::pair<SlotIndex, SlotIndex> SlotPair;
|
|
||||||
typedef std::vector<SlotPair> LoopRanges;
|
|
||||||
typedef std::map<MachineLoop*, LoopRanges> LoopRangeMap;
|
|
||||||
LoopRangeMap loopRangeMap;
|
|
||||||
|
|
||||||
void dumpLoopInfo(MachineLoop &loop);
|
|
||||||
|
|
||||||
void dumpOddTerminators();
|
|
||||||
|
|
||||||
void updateTerminators(MachineBasicBlock &mbb);
|
|
||||||
|
|
||||||
bool canInsertPreHeader(MachineLoop &loop);
|
|
||||||
MachineBasicBlock& insertPreHeader(MachineLoop &loop);
|
|
||||||
|
|
||||||
bool isCriticalEdge(MachineLoop::Edge &edge);
|
|
||||||
bool canSplitEdge(MachineLoop::Edge &edge);
|
|
||||||
MachineBasicBlock& splitEdge(MachineLoop::Edge &edge, MachineLoop &loop);
|
|
||||||
|
|
||||||
LoopRanges& getLoopRanges(MachineLoop &loop);
|
|
||||||
std::pair<bool, SlotPair> getLoopSubRange(const LiveRange &lr,
|
|
||||||
MachineLoop &loop);
|
|
||||||
|
|
||||||
void dumpLoopRanges(MachineLoop &loop);
|
|
||||||
|
|
||||||
void processHeader(LoopSplit &split);
|
|
||||||
void processLoopExits(LoopSplit &split);
|
|
||||||
void processLoopUses(LoopSplit &split);
|
|
||||||
|
|
||||||
bool splitOverLoop(LiveInterval &li, MachineLoop &loop);
|
|
||||||
|
|
||||||
void processInterval(LiveInterval &li);
|
|
||||||
|
|
||||||
void processIntervals();
|
|
||||||
};
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
Loading…
x
Reference in New Issue
Block a user