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It's "necessary" to spell "necessarily" correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5833 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1209,7 +1209,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) {
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// Emit the byte swap instruction...
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switch (Class) {
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case cByte:
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// No byteswap neccesary for 8 bit value...
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// No byteswap necessary for 8 bit value...
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BuildMI(BB, X86::MOVrr8, 1, DestReg).addReg(SrcReg);
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break;
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case cInt:
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@ -1219,7 +1219,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) {
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case cShort:
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// For 16 bit we have to use an xchg instruction, because there is no
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// 16-bit bswap. XCHG is neccesarily not in SSA form, so we force things
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// 16-bit bswap. XCHG is necessarily not in SSA form, so we force things
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// into AX to do the xchg.
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//
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BuildMI(BB, X86::MOVrr16, 1, X86::AX).addReg(SrcReg);
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@ -1209,7 +1209,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) {
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// Emit the byte swap instruction...
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switch (Class) {
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case cByte:
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// No byteswap neccesary for 8 bit value...
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// No byteswap necessary for 8 bit value...
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BuildMI(BB, X86::MOVrr8, 1, DestReg).addReg(SrcReg);
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break;
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case cInt:
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@ -1219,7 +1219,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) {
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case cShort:
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// For 16 bit we have to use an xchg instruction, because there is no
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// 16-bit bswap. XCHG is neccesarily not in SSA form, so we force things
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// 16-bit bswap. XCHG is necessarily not in SSA form, so we force things
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// into AX to do the xchg.
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//
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BuildMI(BB, X86::MOVrr16, 1, X86::AX).addReg(SrcReg);
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