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ARM: respect tied 64-bit inlineasm operands when printing
The code for 'Q' and 'R' operand modifiers needs to look through tied operands to discover the register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188990 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -496,6 +496,23 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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if (!FlagsOP.isImm())
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return true;
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unsigned Flags = FlagsOP.getImm();
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// This operand may not be the one that actually provides the register. If
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// it's tied to a previous one then we should refer instead to that one
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// for registers and their classes.
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unsigned TiedIdx;
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if (InlineAsm::isUseOperandTiedToDef(Flags, TiedIdx)) {
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for (OpNum = InlineAsm::MIOp_FirstOperand; TiedIdx; --TiedIdx) {
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unsigned OpFlags = MI->getOperand(OpNum).getImm();
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OpNum += InlineAsm::getNumOperandRegisters(OpFlags) + 1;
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}
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Flags = MI->getOperand(OpNum).getImm();
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// Later code expects OpNum to be pointing at the register rather than
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// the flags.
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OpNum += 1;
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}
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unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
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unsigned RC;
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InlineAsm::hasRegClassConstraint(Flags, RC);
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