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https://github.com/c64scene-ar/llvm-6502.git
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R600: Control Flow support for pre EG gen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179020 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vincent Lejeune
parent
58852ecc1f
commit
bd7c634ab9
@ -266,17 +266,27 @@ void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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Emit(Inst, OS);
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break;
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}
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case AMDGPU::CF_TC:
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case AMDGPU::CF_VC:
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case AMDGPU::CF_CALL_FS:
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case AMDGPU::CF_TC_EG:
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case AMDGPU::CF_VC_EG:
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case AMDGPU::CF_CALL_FS_EG:
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case AMDGPU::CF_TC_R600:
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case AMDGPU::CF_VC_R600:
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case AMDGPU::CF_CALL_FS_R600:
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return;
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case AMDGPU::WHILE_LOOP:
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case AMDGPU::END_LOOP:
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case AMDGPU::LOOP_BREAK:
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case AMDGPU::CF_CONTINUE:
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case AMDGPU::CF_JUMP:
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case AMDGPU::CF_ELSE:
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case AMDGPU::POP: {
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case AMDGPU::WHILE_LOOP_EG:
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case AMDGPU::END_LOOP_EG:
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case AMDGPU::LOOP_BREAK_EG:
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case AMDGPU::CF_CONTINUE_EG:
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case AMDGPU::CF_JUMP_EG:
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case AMDGPU::CF_ELSE_EG:
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case AMDGPU::POP_EG:
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case AMDGPU::WHILE_LOOP_R600:
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case AMDGPU::END_LOOP_R600:
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case AMDGPU::LOOP_BREAK_R600:
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case AMDGPU::CF_CONTINUE_R600:
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case AMDGPU::CF_JUMP_R600:
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case AMDGPU::CF_ELSE_R600:
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case AMDGPU::POP_R600: {
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uint64_t Inst = getBinaryCodeForInstr(MI, Fixups);
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EmitByte(INSTR_NATIVE, OS);
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Emit(Inst, OS);
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@ -30,9 +30,22 @@ namespace llvm {
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class R600ControlFlowFinalizer : public MachineFunctionPass {
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private:
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enum ControlFlowInstruction {
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CF_TC,
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CF_CALL_FS,
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CF_WHILE_LOOP,
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CF_END_LOOP,
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CF_LOOP_BREAK,
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CF_LOOP_CONTINUE,
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CF_JUMP,
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CF_ELSE,
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CF_POP
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};
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static char ID;
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const R600InstrInfo *TII;
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unsigned MaxFetchInst;
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const AMDGPUSubtarget &ST;
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bool isFetch(const MachineInstr *MI) const {
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switch (MI->getOpcode()) {
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@ -70,6 +83,52 @@ private:
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}
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}
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const MCInstrDesc &getHWInstrDesc(ControlFlowInstruction CFI) const {
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if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD4XXX) {
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switch (CFI) {
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case CF_TC:
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return TII->get(AMDGPU::CF_TC_R600);
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case CF_CALL_FS:
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return TII->get(AMDGPU::CF_CALL_FS_R600);
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case CF_WHILE_LOOP:
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return TII->get(AMDGPU::WHILE_LOOP_R600);
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case CF_END_LOOP:
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return TII->get(AMDGPU::END_LOOP_R600);
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case CF_LOOP_BREAK:
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return TII->get(AMDGPU::LOOP_BREAK_R600);
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case CF_LOOP_CONTINUE:
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return TII->get(AMDGPU::CF_CONTINUE_R600);
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case CF_JUMP:
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return TII->get(AMDGPU::CF_JUMP_R600);
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case CF_ELSE:
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return TII->get(AMDGPU::CF_ELSE_R600);
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case CF_POP:
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return TII->get(AMDGPU::POP_R600);
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}
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} else {
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switch (CFI) {
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case CF_TC:
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return TII->get(AMDGPU::CF_TC_EG);
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case CF_CALL_FS:
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return TII->get(AMDGPU::CF_CALL_FS_EG);
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case CF_WHILE_LOOP:
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return TII->get(AMDGPU::WHILE_LOOP_EG);
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case CF_END_LOOP:
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return TII->get(AMDGPU::END_LOOP_EG);
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case CF_LOOP_BREAK:
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return TII->get(AMDGPU::LOOP_BREAK_EG);
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case CF_LOOP_CONTINUE:
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return TII->get(AMDGPU::CF_CONTINUE_EG);
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case CF_JUMP:
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return TII->get(AMDGPU::CF_JUMP_EG);
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case CF_ELSE:
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return TII->get(AMDGPU::CF_ELSE_EG);
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case CF_POP:
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return TII->get(AMDGPU::POP_EG);
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}
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}
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}
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MachineBasicBlock::iterator
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MakeFetchClause(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned CfAddress) const {
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@ -85,7 +144,7 @@ private:
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break;
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}
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BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead),
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TII->get(AMDGPU::CF_TC))
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getHWInstrDesc(CF_TC))
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.addImm(CfAddress) // ADDR
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.addImm(AluInstCount); // COUNT
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return I;
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@ -104,7 +163,8 @@ private:
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public:
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R600ControlFlowFinalizer(TargetMachine &tm) : MachineFunctionPass(ID),
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TII (static_cast<const R600InstrInfo *>(tm.getInstrInfo())) {
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TII (static_cast<const R600InstrInfo *>(tm.getInstrInfo())),
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ST(tm.getSubtarget<AMDGPUSubtarget>()) {
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const AMDGPUSubtarget &ST = tm.getSubtarget<AMDGPUSubtarget>();
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if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD4XXX)
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MaxFetchInst = 8;
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@ -124,7 +184,7 @@ public:
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R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
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if (MFI->ShaderType == 1) {
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BuildMI(MBB, MBB.begin(), MBB.findDebugLoc(MBB.begin()),
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TII->get(AMDGPU::CF_CALL_FS));
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getHWInstrDesc(CF_CALL_FS));
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CfCount++;
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}
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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@ -154,7 +214,7 @@ public:
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CurrentStack++;
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MaxStack = std::max(MaxStack, CurrentStack);
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MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
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TII->get(AMDGPU::WHILE_LOOP))
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getHWInstrDesc(CF_WHILE_LOOP))
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.addImm(2);
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std::pair<unsigned, std::set<MachineInstr *> > Pair(CfCount,
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std::set<MachineInstr *>());
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@ -170,7 +230,7 @@ public:
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LoopStack.back();
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LoopStack.pop_back();
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CounterPropagateAddr(Pair.second, CfCount);
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), TII->get(AMDGPU::END_LOOP))
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_END_LOOP))
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.addImm(Pair.first + 1);
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MI->eraseFromParent();
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CfCount++;
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@ -178,7 +238,7 @@ public:
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}
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case AMDGPU::IF_PREDICATE_SET: {
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MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
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TII->get(AMDGPU::CF_JUMP))
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getHWInstrDesc(CF_JUMP))
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.addImm(0)
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.addImm(0);
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IfThenElseStack.push_back(MIb);
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@ -192,7 +252,7 @@ public:
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IfThenElseStack.pop_back();
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CounterPropagateAddr(JumpInst, CfCount);
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MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
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TII->get(AMDGPU::CF_ELSE))
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getHWInstrDesc(CF_ELSE))
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.addImm(0)
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.addImm(1);
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DEBUG(dbgs() << CfCount << ":"; MIb->dump(););
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@ -207,7 +267,7 @@ public:
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IfThenElseStack.pop_back();
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CounterPropagateAddr(IfOrElseInst, CfCount + 1);
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MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
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TII->get(AMDGPU::POP))
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getHWInstrDesc(CF_POP))
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.addImm(CfCount + 1)
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.addImm(1);
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DEBUG(dbgs() << CfCount << ":"; MIb->dump(););
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@ -218,13 +278,13 @@ public:
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case AMDGPU::PREDICATED_BREAK: {
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CurrentStack--;
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CfCount += 3;
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), TII->get(AMDGPU::CF_JUMP))
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_JUMP))
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.addImm(CfCount)
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.addImm(1);
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MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
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TII->get(AMDGPU::LOOP_BREAK))
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getHWInstrDesc(CF_LOOP_BREAK))
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.addImm(0);
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), TII->get(AMDGPU::POP))
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_POP))
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.addImm(CfCount)
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.addImm(1);
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LoopStack.back().second.insert(MIb);
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@ -233,7 +293,7 @@ public:
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}
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case AMDGPU::CONTINUE: {
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MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
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TII->get(AMDGPU::CF_CONTINUE))
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getHWInstrDesc(CF_LOOP_CONTINUE))
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.addImm(0);
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LoopStack.back().second.insert(MIb);
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MI->eraseFromParent();
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@ -823,7 +823,61 @@ i32imm:$KCACHE_ADDR0, i32imm:$KCACHE_ADDR1, i32imm:$COUNT),
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let Inst{63-32} = Word1;
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}
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class CF_WORD0 {
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class CF_WORD0_R600 {
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field bits<32> Word0;
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bits<32> ADDR;
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let Word0 = ADDR;
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}
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class CF_WORD1_R600 {
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field bits<32> Word1;
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bits<3> POP_COUNT;
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bits<5> CF_CONST;
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bits<2> COND;
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bits<3> COUNT;
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bits<6> CALL_COUNT;
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bits<1> COUNT_3;
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bits<1> END_OF_PROGRAM;
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bits<1> VALID_PIXEL_MODE;
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bits<7> CF_INST;
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bits<1> WHOLE_QUAD_MODE;
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bits<1> BARRIER;
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let Word1{2-0} = POP_COUNT;
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let Word1{7-3} = CF_CONST;
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let Word1{9-8} = COND;
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let Word1{12-10} = COUNT;
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let Word1{18-13} = CALL_COUNT;
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let Word1{19} = COUNT_3;
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let Word1{21} = END_OF_PROGRAM;
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let Word1{22} = VALID_PIXEL_MODE;
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let Word1{29-23} = CF_INST;
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let Word1{30} = WHOLE_QUAD_MODE;
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let Word1{31} = BARRIER;
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}
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class CF_CLAUSE_R600 <bits<7> inst, dag ins, string AsmPrint> : AMDGPUInst <(outs),
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ins, AsmPrint, [] >, CF_WORD0_R600, CF_WORD1_R600 {
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field bits<64> Inst;
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let CF_INST = inst;
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let BARRIER = 1;
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let CF_CONST = 0;
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let VALID_PIXEL_MODE = 0;
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let COND = 0;
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let CALL_COUNT = 0;
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let COUNT_3 = 0;
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let END_OF_PROGRAM = 0;
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let WHOLE_QUAD_MODE = 0;
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let Inst{31-0} = Word0;
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let Inst{63-32} = Word1;
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}
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class CF_WORD0_EG {
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field bits<32> Word0;
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bits<24> ADDR;
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@ -833,7 +887,7 @@ class CF_WORD0 {
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let Word0{26-24} = JUMPTABLE_SEL;
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}
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class CF_WORD1 {
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class CF_WORD1_EG {
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field bits<32> Word1;
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bits<3> POP_COUNT;
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@ -853,8 +907,8 @@ class CF_WORD1 {
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let Word1{31} = BARRIER;
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}
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class CF_CLAUSE <bits<8> inst, dag ins, string AsmPrint> : AMDGPUInst <(outs),
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ins, AsmPrint, [] >, CF_WORD0, CF_WORD1 {
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class CF_CLAUSE_EG <bits<8> inst, dag ins, string AsmPrint> : AMDGPUInst <(outs),
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ins, AsmPrint, [] >, CF_WORD0_EG, CF_WORD1_EG {
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field bits<64> Inst;
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let CF_INST = inst;
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@ -868,54 +922,6 @@ ins, AsmPrint, [] >, CF_WORD0, CF_WORD1 {
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let Inst{63-32} = Word1;
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}
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def CF_TC : CF_CLAUSE<1, (ins i32imm:$ADDR, i32imm:$COUNT),
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"TEX $COUNT @$ADDR"> {
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let POP_COUNT = 0;
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}
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def CF_VC : CF_CLAUSE<2, (ins i32imm:$ADDR, i32imm:$COUNT),
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"VTX $COUNT @$ADDR"> {
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let POP_COUNT = 0;
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}
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def WHILE_LOOP : CF_CLAUSE<6, (ins i32imm:$ADDR), "LOOP_START_DX10 @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def END_LOOP : CF_CLAUSE<5, (ins i32imm:$ADDR), "END_LOOP @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def LOOP_BREAK : CF_CLAUSE<9, (ins i32imm:$ADDR), "LOOP_BREAK @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def CF_CONTINUE : CF_CLAUSE<8, (ins i32imm:$ADDR), "CONTINUE @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def CF_JUMP : CF_CLAUSE<10, (ins i32imm:$ADDR, i32imm:$POP_COUNT), "JUMP @$ADDR POP:$POP_COUNT"> {
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let COUNT = 0;
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}
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def CF_ELSE : CF_CLAUSE<13, (ins i32imm:$ADDR, i32imm:$POP_COUNT), "ELSE @$ADDR POP:$POP_COUNT"> {
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let COUNT = 0;
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}
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def CF_CALL_FS : CF_CLAUSE<19, (ins), "CALL_FS"> {
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let ADDR = 0;
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let COUNT = 0;
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let POP_COUNT = 0;
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}
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def POP : CF_CLAUSE<14, (ins i32imm:$ADDR, i32imm:$POP_COUNT), "POP @$ADDR POP:$POP_COUNT"> {
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let COUNT = 0;
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}
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def CF_ALU : ALU_CLAUSE<8, "ALU">;
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def CF_ALU_PUSH_BEFORE : ALU_CLAUSE<9, "ALU_PUSH_BEFORE">;
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@ -1433,6 +1439,52 @@ let Predicates = [isR600] in {
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let Word1{31} = 1; // BARRIER
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}
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defm : SteamOutputExportPattern<R600_ExportBuf, 0x20, 0x21, 0x22, 0x23>;
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def CF_TC_R600 : CF_CLAUSE_R600<1, (ins i32imm:$ADDR, i32imm:$COUNT),
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"TEX $COUNT @$ADDR"> {
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let POP_COUNT = 0;
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}
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def CF_VC_R600 : CF_CLAUSE_R600<2, (ins i32imm:$ADDR, i32imm:$COUNT),
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"VTX $COUNT @$ADDR"> {
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let POP_COUNT = 0;
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}
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def WHILE_LOOP_R600 : CF_CLAUSE_R600<6, (ins i32imm:$ADDR),
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"LOOP_START_DX10 @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def END_LOOP_R600 : CF_CLAUSE_R600<5, (ins i32imm:$ADDR), "END_LOOP @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def LOOP_BREAK_R600 : CF_CLAUSE_R600<9, (ins i32imm:$ADDR),
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"LOOP_BREAK @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def CF_CONTINUE_R600 : CF_CLAUSE_R600<8, (ins i32imm:$ADDR),
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"CONTINUE @$ADDR"> {
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let POP_COUNT = 0;
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let COUNT = 0;
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}
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def CF_JUMP_R600 : CF_CLAUSE_R600<10, (ins i32imm:$ADDR, i32imm:$POP_COUNT),
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"JUMP @$ADDR POP:$POP_COUNT"> {
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let COUNT = 0;
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}
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def CF_ELSE_R600 : CF_CLAUSE_R600<13, (ins i32imm:$ADDR, i32imm:$POP_COUNT),
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"ELSE @$ADDR POP:$POP_COUNT"> {
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let COUNT = 0;
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}
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def CF_CALL_FS_R600 : CF_CLAUSE_R600<19, (ins), "CALL_FS"> {
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let ADDR = 0;
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let COUNT = 0;
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let POP_COUNT = 0;
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}
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def POP_R600 : CF_CLAUSE_R600<14, (ins i32imm:$ADDR, i32imm:$POP_COUNT),
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"POP @$ADDR POP:$POP_COUNT"> {
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let COUNT = 0;
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}
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}
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// Helper pattern for normalizing inputs to triginomic instructions for R700+
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@ -1589,6 +1641,52 @@ let hasSideEffects = 1 in {
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}
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defm : SteamOutputExportPattern<EG_ExportBuf, 0x40, 0x41, 0x42, 0x43>;
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def CF_TC_EG : CF_CLAUSE_EG<1, (ins i32imm:$ADDR, i32imm:$COUNT),
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"TEX $COUNT @$ADDR"> {
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let POP_COUNT = 0;
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}
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def CF_VC_EG : CF_CLAUSE_EG<2, (ins i32imm:$ADDR, i32imm:$COUNT),
|
||||
"VTX $COUNT @$ADDR"> {
|
||||
let POP_COUNT = 0;
|
||||
}
|
||||
def WHILE_LOOP_EG : CF_CLAUSE_EG<6, (ins i32imm:$ADDR),
|
||||
"LOOP_START_DX10 @$ADDR"> {
|
||||
let POP_COUNT = 0;
|
||||
let COUNT = 0;
|
||||
}
|
||||
def END_LOOP_EG : CF_CLAUSE_EG<5, (ins i32imm:$ADDR), "END_LOOP @$ADDR"> {
|
||||
let POP_COUNT = 0;
|
||||
let COUNT = 0;
|
||||
}
|
||||
def LOOP_BREAK_EG : CF_CLAUSE_EG<9, (ins i32imm:$ADDR),
|
||||
"LOOP_BREAK @$ADDR"> {
|
||||
let POP_COUNT = 0;
|
||||
let COUNT = 0;
|
||||
}
|
||||
def CF_CONTINUE_EG : CF_CLAUSE_EG<8, (ins i32imm:$ADDR),
|
||||
"CONTINUE @$ADDR"> {
|
||||
let POP_COUNT = 0;
|
||||
let COUNT = 0;
|
||||
}
|
||||
def CF_JUMP_EG : CF_CLAUSE_EG<10, (ins i32imm:$ADDR, i32imm:$POP_COUNT),
|
||||
"JUMP @$ADDR POP:$POP_COUNT"> {
|
||||
let COUNT = 0;
|
||||
}
|
||||
def CF_ELSE_EG : CF_CLAUSE_EG<13, (ins i32imm:$ADDR, i32imm:$POP_COUNT),
|
||||
"ELSE @$ADDR POP:$POP_COUNT"> {
|
||||
let COUNT = 0;
|
||||
}
|
||||
def CF_CALL_FS_EG : CF_CLAUSE_EG<19, (ins), "CALL_FS"> {
|
||||
let ADDR = 0;
|
||||
let COUNT = 0;
|
||||
let POP_COUNT = 0;
|
||||
}
|
||||
def POP_EG : CF_CLAUSE_EG<14, (ins i32imm:$ADDR, i32imm:$POP_COUNT),
|
||||
"POP @$ADDR POP:$POP_COUNT"> {
|
||||
let COUNT = 0;
|
||||
}
|
||||
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Memory read/write instructions
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user