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Change variable name.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135522 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-07-19 20:56:53 +00:00
parent ccfd9313d1
commit bdd83fe382
1 changed files with 3 additions and 3 deletions
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6
lib/Target/Mips/MipsISelLowering.cpp
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@ -822,7 +822,7 @@ MipsTargetLowering::EmitAtomicBinaryPartword(MachineInstr *MI,
unsigned MaskUpper = RegInfo.createVirtualRegister(RC); unsigned MaskUpper = RegInfo.createVirtualRegister(RC);
unsigned AndRes = RegInfo.createVirtualRegister(RC); unsigned AndRes = RegInfo.createVirtualRegister(RC);
unsigned BinOpRes = RegInfo.createVirtualRegister(RC); unsigned BinOpRes = RegInfo.createVirtualRegister(RC);
unsigned MaskOldVal0 = RegInfo.createVirtualRegister(RC); unsigned MaskedOldVal0 = RegInfo.createVirtualRegister(RC);
unsigned StoreVal = RegInfo.createVirtualRegister(RC); unsigned StoreVal = RegInfo.createVirtualRegister(RC);
unsigned MaskedOldVal1 = RegInfo.createVirtualRegister(RC); unsigned MaskedOldVal1 = RegInfo.createVirtualRegister(RC);
unsigned SrlRes = RegInfo.createVirtualRegister(RC); unsigned SrlRes = RegInfo.createVirtualRegister(RC);
@ -915,10 +915,10 @@ MipsTargetLowering::EmitAtomicBinaryPartword(MachineInstr *MI,
BuildMI(BB, dl, TII->get(Mips::AND), NewVal).addReg(Incr2).addReg(Mask); BuildMI(BB, dl, TII->get(Mips::AND), NewVal).addReg(Incr2).addReg(Mask);
} }
BuildMI(BB, dl, TII->get(Mips::AND), MaskOldVal0) BuildMI(BB, dl, TII->get(Mips::AND), MaskedOldVal0)
.addReg(OldVal).addReg(Mask2); .addReg(OldVal).addReg(Mask2);
BuildMI(BB, dl, TII->get(Mips::OR), StoreVal) BuildMI(BB, dl, TII->get(Mips::OR), StoreVal)
.addReg(MaskOldVal0).addReg(NewVal); .addReg(MaskedOldVal0).addReg(NewVal);
BuildMI(BB, dl, TII->get(Mips::SC), Success) BuildMI(BB, dl, TII->get(Mips::SC), Success)
.addReg(StoreVal).addReg(AlignedAddr).addImm(0); .addReg(StoreVal).addReg(AlignedAddr).addImm(0);
BuildMI(BB, dl, TII->get(Mips::BEQ)) BuildMI(BB, dl, TII->get(Mips::BEQ))