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Add result promotion of FP_TO_*INT, fixing CodeGen/X86/trunc-to-bool.ll

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with the new legalizer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43199 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-10-20 04:32:38 +00:00
parent aaeb0c8666
commit be5a0a4668
1 changed files with 29 additions and 1 deletions
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30
lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp
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@ -141,6 +141,7 @@ private:
SDOperand PromoteResult_TRUNCATE(SDNode *N);
SDOperand PromoteResult_INT_EXTEND(SDNode *N);
SDOperand PromoteResult_FP_ROUND(SDNode *N);
SDOperand PromoteResult_FP_TO_XINT(SDNode *N);
SDOperand PromoteResult_SETCC(SDNode *N);
SDOperand PromoteResult_LOAD(LoadSDNode *N);
SDOperand PromoteResult_SimpleIntBinOp(SDNode *N);
@ -524,7 +525,8 @@ void DAGTypeLegalizer::PromoteResult(SDNode *N, unsigned ResNo) {
case ISD::ZERO_EXTEND:
case ISD::ANY_EXTEND: Result = PromoteResult_INT_EXTEND(N); break;
case ISD::FP_ROUND: Result = PromoteResult_FP_ROUND(N); break;
case ISD::FP_TO_SINT:
case ISD::FP_TO_UINT: Result = PromoteResult_FP_TO_XINT(N); break;
case ISD::SETCC: Result = PromoteResult_SETCC(N); break;
case ISD::LOAD: Result = PromoteResult_LOAD(cast<LoadSDNode>(N)); break;
@ -620,6 +622,32 @@ SDOperand DAGTypeLegalizer::PromoteResult_FP_ROUND(SDNode *N) {
N->getOperand(0), DAG.getValueType(N->getValueType(0)));
}
SDOperand DAGTypeLegalizer::PromoteResult_FP_TO_XINT(SDNode *N) {
SDOperand Op = N->getOperand(0);
// If the operand needed to be promoted, do so now.
if (getTypeAction(Op.getValueType()) == Promote)
// The input result is prerounded, so we don't have to do anything special.
Op = GetPromotedOp(Op);
unsigned NewOpc = N->getOpcode();
MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
// If we're promoting a UINT to a larger size, check to see if the new node
// will be legal. If it isn't, check to see if FP_TO_SINT is legal, since
// we can use that instead. This allows us to generate better code for
// FP_TO_UINT for small destination sizes on targets where FP_TO_UINT is not
// legal, such as PowerPC.
if (N->getOpcode() == ISD::FP_TO_UINT) {
if (!TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) &&
(TLI.isOperationLegal(ISD::FP_TO_SINT, NVT) ||
TLI.getOperationAction(ISD::FP_TO_SINT, NVT)==TargetLowering::Custom))
NewOpc = ISD::FP_TO_SINT;
}
return DAG.getNode(NewOpc, NVT, Op);
}
SDOperand DAGTypeLegalizer::PromoteResult_SETCC(SDNode *N) {
assert(isTypeLegal(TLI.getSetCCResultTy()) && "SetCC type is not legal??");
return DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), N->getOperand(0),