From be91232900776c23d4b327be7bc3f03f711d11a8 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Wed, 29 Sep 2010 17:32:29 +0000 Subject: [PATCH] Add braces for legibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115043 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMISelDAGToDAG.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index bcaf6623393..7bc7b4ae01b 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -289,7 +289,7 @@ bool ARMDAGToDAGISel::SelectAddrMode2(SDValue N, } // Match simple R +/- imm12 operands. - if (N.getOpcode() == ISD::ADD) + if (N.getOpcode() == ISD::ADD) { if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { int RHSC = (int)RHS->getZExtValue(); if ((RHSC >= 0 && RHSC < 0x1000) || @@ -312,6 +312,7 @@ bool ARMDAGToDAGISel::SelectAddrMode2(SDValue N, return true; } } + } // Otherwise this is R +/- [possibly shifted] R. ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::ADD ? ARM_AM::add:ARM_AM::sub;