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We compile this into:
_swap_16: slwi r2, r3, 24 rlwimi r2, r3, 8, 8, 15 srwi r3, r2, 16 blr now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29864 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -162,24 +162,6 @@ target!
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//===---------------------------------------------------------------------===//
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Consider this:
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unsigned short swap_16(unsigned short v) { return (v>>8) | (v<<8); }
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Compiled with the ppc backend:
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_swap_16:
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slwi r2, r3, 8
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srwi r3, r3, 8
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or r2, r3, r2
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rlwinm r3, r2, 0, 16, 31
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blr
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The rlwinm (an and by 65535) is dead. The dag combiner should propagate bits
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better than that to see this.
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//===---------------------------------------------------------------------===//
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Add support for conditional increments, and other related patterns. Instead
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of:
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