We compile this into:

_swap_16:
        slwi r2, r3, 24
        rlwimi r2, r3, 8, 8, 15
        srwi r3, r2, 16
        blr

now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29864 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-08-24 23:06:02 +00:00
parent ad69970c4a
commit bf16982e86

View File

@ -162,24 +162,6 @@ target!
//===---------------------------------------------------------------------===//
Consider this:
unsigned short swap_16(unsigned short v) { return (v>>8) | (v<<8); }
Compiled with the ppc backend:
_swap_16:
slwi r2, r3, 8
srwi r3, r3, 8
or r2, r3, r2
rlwinm r3, r2, 0, 16, 31
blr
The rlwinm (an and by 65535) is dead. The dag combiner should propagate bits
better than that to see this.
//===---------------------------------------------------------------------===//
Add support for conditional increments, and other related patterns. Instead
of: