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[mips] Clean up code in MipsTargetLowering::LowerCall. No functional change
intended git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173189 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2810,7 +2810,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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getPointerTy());
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getPointerTy());
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// With EABI is it possible to have 16 args on registers.
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// With EABI is it possible to have 16 args on registers.
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SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass;
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std::deque< std::pair<unsigned, SDValue> > RegsToPass;
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SmallVector<SDValue, 8> MemOpChains;
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SmallVector<SDValue, 8> MemOpChains;
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MipsCC::byval_iterator ByValArg = MipsCCInfo.byval_begin();
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MipsCC::byval_iterator ByValArg = MipsCCInfo.byval_begin();
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@ -2928,23 +2928,16 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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GlobalOrExternal = true;
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GlobalOrExternal = true;
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}
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}
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SDValue InFlag;
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SDValue JumpTarget = Callee;
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// T9 register operand.
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SDValue T9;
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// T9 should contain the address of the callee function if
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// T9 should contain the address of the callee function if
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// -reloction-model=pic or it is an indirect call.
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// -reloction-model=pic or it is an indirect call.
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if (IsPICCall || !GlobalOrExternal) {
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if (IsPICCall || !GlobalOrExternal) {
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// copy to T9
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unsigned T9Reg = IsN64 ? Mips::T9_64 : Mips::T9;
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unsigned T9Reg = IsN64 ? Mips::T9_64 : Mips::T9;
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Chain = DAG.getCopyToReg(Chain, dl, T9Reg, Callee, SDValue(0, 0));
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RegsToPass.push_front(std::make_pair(T9Reg, Callee));
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InFlag = Chain.getValue(1);
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if (Subtarget->inMips16Mode())
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if (!Subtarget->inMips16Mode())
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T9 = DAG.getRegister(T9Reg, getPointerTy());
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JumpTarget = SDValue();
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else
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Callee = DAG.getRegister(T9Reg, getPointerTy());
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}
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}
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// Insert node "GP copy globalreg" before call to function.
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// Insert node "GP copy globalreg" before call to function.
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@ -2962,6 +2955,8 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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// chain and flag operands which copy the outgoing args into registers.
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// chain and flag operands which copy the outgoing args into registers.
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// The InFlag in necessary since all emitted instructions must be
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// The InFlag in necessary since all emitted instructions must be
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// stuck together.
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// stuck together.
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SDValue InFlag;
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
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Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
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Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
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RegsToPass[i].second, InFlag);
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RegsToPass[i].second, InFlag);
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@ -2973,9 +2968,10 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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//
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//
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// Returns a chain & a flag for retval copy to use.
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// Returns a chain & a flag for retval copy to use.
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SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
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SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
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SmallVector<SDValue, 8> Ops;
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SmallVector<SDValue, 8> Ops(1, Chain);
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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if (JumpTarget.getNode())
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Ops.push_back(JumpTarget);
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// Add argument registers to the end of the list so that they are
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// Add argument registers to the end of the list so that they are
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// known live into the call.
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// known live into the call.
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@ -2983,10 +2979,6 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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Ops.push_back(DAG.getRegister(RegsToPass[i].first,
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Ops.push_back(DAG.getRegister(RegsToPass[i].first,
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RegsToPass[i].second.getValueType()));
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RegsToPass[i].second.getValueType()));
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// Add T9 register operand.
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if (T9.getNode())
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Ops.push_back(T9);
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// Add a register mask operand representing the call-preserved registers.
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// Add a register mask operand representing the call-preserved registers.
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const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
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const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
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const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
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const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
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@ -3726,7 +3718,7 @@ copyByValRegs(SDValue Chain, DebugLoc DL, std::vector<SDValue> &OutChains,
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// Copy byVal arg to registers and stack.
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// Copy byVal arg to registers and stack.
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void MipsTargetLowering::
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void MipsTargetLowering::
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passByValArg(SDValue Chain, DebugLoc DL,
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passByValArg(SDValue Chain, DebugLoc DL,
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SmallVector<std::pair<unsigned, SDValue>, 16> &RegsToPass,
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std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
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SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr,
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SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr,
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MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
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MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
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const MipsCC &CC, const ByValArgInfo &ByVal,
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const MipsCC &CC, const ByValArgInfo &ByVal,
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@ -20,6 +20,7 @@
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetLowering.h"
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#include <deque>
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namespace llvm {
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namespace llvm {
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namespace MipsISD {
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namespace MipsISD {
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@ -294,7 +295,7 @@ namespace llvm {
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/// passByValArg - Pass a byval argument in registers or on stack.
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/// passByValArg - Pass a byval argument in registers or on stack.
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void passByValArg(SDValue Chain, DebugLoc DL,
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void passByValArg(SDValue Chain, DebugLoc DL,
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SmallVector<std::pair<unsigned, SDValue>, 16> &RegsToPass,
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std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
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SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr,
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SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr,
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MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
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MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
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const MipsCC &CC, const ByValArgInfo &ByVal,
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const MipsCC &CC, const ByValArgInfo &ByVal,
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