mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-29 10:32:47 +00:00
Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.
Here is a theoretical example that illustrates why the placement is important. tmp1 = store tmp1 -> x ... tmp2 = add ... ... call ... store tmp2 -> x Now mem2reg comes along: tmp1 = dbg_value (tmp1 -> x) ... tmp2 = add ... ... call ... dbg_value (tmp2 -> x) When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1. Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers"). This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99469 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
7c3d45a03e
commit
bfcb305189
@ -285,6 +285,11 @@ public:
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IsEarlyClobber = Val;
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}
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void setIsDebug(bool Val = true) {
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assert(isReg() && IsDef && "Wrong MachineOperand accessor");
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IsDebug = Val;
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}
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//===--------------------------------------------------------------------===//
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// Accessors for various operand types.
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//===--------------------------------------------------------------------===//
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@ -60,42 +60,40 @@ private:
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/// SDDbgInfo - Keeps track of dbg_value information through SDISel. We do
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/// not build SDNodes for these so as not to perturb the generated code;
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/// instead the info is kept off to the side in this structure. SDNodes may
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/// have an associated dbg_value entry in DbgValMap. Debug info that is not
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/// associated with any SDNode is held in DbgConstMap. It is possible for
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/// optimizations to change a variable to a constant, in which case the
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/// corresponding debug info is moved from the variable to the constant table
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/// (NYI).
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/// instead the info is kept off to the side in this structure. Each SDNode may
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/// have one or more associated dbg_value entries. This information is kept in
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/// DbgValMap.
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class SDDbgInfo {
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DenseMap<const SDNode*, SDDbgValue*> DbgVblMap;
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SmallVector<SDDbgValue*, 4> DbgConstMap;
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SmallVector<SDDbgValue*, 32> DbgValues;
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DenseMap<const SDNode*, SmallVector<SDDbgValue*, 2> > DbgVblMap;
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void operator=(const SDDbgInfo&); // Do not implement.
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SDDbgInfo(const SDDbgInfo&); // Do not implement.
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public:
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SDDbgInfo() {}
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void add(const SDNode *Node, SDDbgValue *V) {
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DbgVblMap[Node] = V;
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void add(SDDbgValue *V, const SDNode *Node = 0) {
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if (Node)
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DbgVblMap[Node].push_back(V);
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DbgValues.push_back(V);
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}
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void add(SDDbgValue *V) { DbgConstMap.push_back(V); }
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void remove(const SDNode *Node) {
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DenseMap<const SDNode*, SDDbgValue*>::iterator Itr =
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DbgVblMap.find(Node);
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if (Itr != DbgVblMap.end())
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DbgVblMap.erase(Itr);
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}
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// No need to remove a constant.
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void clear() {
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DbgVblMap.clear();
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DbgConstMap.clear();
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DbgValues.clear();
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}
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SDDbgValue *getSDDbgValue(const SDNode *Node) {
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bool empty() const {
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return DbgValues.empty();
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}
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SmallVector<SDDbgValue*,2> &getSDDbgValues(const SDNode *Node) {
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return DbgVblMap[Node];
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}
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typedef SmallVector<SDDbgValue*, 4>::iterator ConstDbgIterator;
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ConstDbgIterator DbgConstBegin() { return DbgConstMap.begin(); }
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ConstDbgIterator DbgConstEnd() { return DbgConstMap.end(); }
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typedef SmallVector<SDDbgValue*,32>::iterator DbgIterator;
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DbgIterator DbgBegin() { return DbgValues.begin(); }
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DbgIterator DbgEnd() { return DbgValues.end(); }
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};
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enum CombineLevel {
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@ -871,19 +869,21 @@ public:
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/// GetOrdering - Get the order for the SDNode.
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unsigned GetOrdering(const SDNode *SD) const;
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/// AssignDbgInfo - Assign debug info to the SDNode.
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void AssignDbgInfo(SDNode *SD, SDDbgValue *db);
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/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
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/// value is produced by SD.
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void AddDbgValue(SDDbgValue *DB, SDNode *SD = 0);
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/// RememberDbgInfo - Remember debug info with no associated SDNode.
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void RememberDbgInfo(SDDbgValue *db);
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/// GetDbgInfo - Get the debug info for the SDNode.
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SDDbgValue *GetDbgInfo(const SDNode* SD);
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SDDbgInfo::ConstDbgIterator DbgConstBegin() {
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return DbgInfo->DbgConstBegin();
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/// GetDbgValues - Get the debug values which reference the given SDNode.
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SmallVector<SDDbgValue*,2> &GetDbgValues(const SDNode* SD) {
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return DbgInfo->getSDDbgValues(SD);
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}
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SDDbgInfo::ConstDbgIterator DbgConstEnd() { return DbgInfo->DbgConstEnd(); }
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/// hasDebugValues - Return true if there are any SDDbgValue nodes associated
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/// with this SelectionDAG.
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bool hasDebugValues() const { return !DbgInfo->empty(); }
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SDDbgInfo::DbgIterator DbgBegin() { return DbgInfo->DbgBegin(); }
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SDDbgInfo::DbgIterator DbgEnd() { return DbgInfo->DbgEnd(); }
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void dump() const;
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@ -264,7 +264,8 @@ void
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InstrEmitter::AddRegisterOperand(MachineInstr *MI, SDValue Op,
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unsigned IIOpNum,
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const TargetInstrDesc *II,
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DenseMap<SDValue, unsigned> &VRBaseMap) {
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DenseMap<SDValue, unsigned> &VRBaseMap,
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bool IsDebug) {
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assert(Op.getValueType() != MVT::Other &&
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Op.getValueType() != MVT::Flag &&
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"Chain and flag operands should occur at end of operand list!");
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@ -295,7 +296,11 @@ InstrEmitter::AddRegisterOperand(MachineInstr *MI, SDValue Op,
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}
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}
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MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef));
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MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef,
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false/*isImp*/, false/*isKill*/,
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false/*isDead*/, false/*isUndef*/,
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false/*isEarlyClobber*/,
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0/*SubReg*/, IsDebug));
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}
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/// AddOperand - Add the specified operand to the specified machine instr. II
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@ -305,9 +310,10 @@ InstrEmitter::AddRegisterOperand(MachineInstr *MI, SDValue Op,
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void InstrEmitter::AddOperand(MachineInstr *MI, SDValue Op,
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unsigned IIOpNum,
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const TargetInstrDesc *II,
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DenseMap<SDValue, unsigned> &VRBaseMap) {
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DenseMap<SDValue, unsigned> &VRBaseMap,
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bool IsDebug) {
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if (Op.isMachineOpcode()) {
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AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap);
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AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap, IsDebug);
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} else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
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MI->addOperand(MachineOperand::CreateImm(C->getSExtValue()));
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} else if (ConstantFPSDNode *F = dyn_cast<ConstantFPSDNode>(Op)) {
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@ -356,7 +362,7 @@ void InstrEmitter::AddOperand(MachineInstr *MI, SDValue Op,
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assert(Op.getValueType() != MVT::Other &&
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Op.getValueType() != MVT::Flag &&
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"Chain and flag operands should occur at end of operand list!");
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AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap);
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AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap, IsDebug);
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}
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}
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@ -498,75 +504,48 @@ InstrEmitter::EmitCopyToRegClassNode(SDNode *Node,
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assert(isNew && "Node emitted out of order - early");
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}
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/// EmitDbgValue - Generate any debug info that refers to this Node. Constant
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/// dbg_value is not handled here.
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void
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InstrEmitter::EmitDbgValue(SDNode *Node,
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DenseMap<SDValue, unsigned> &VRBaseMap,
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SDDbgValue *sd) {
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if (!Node->getHasDebugValue())
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return;
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if (!sd)
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return;
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assert(sd->getKind() == SDDbgValue::SDNODE);
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unsigned VReg = getVR(SDValue(sd->getSDNode(), sd->getResNo()), VRBaseMap);
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const TargetInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
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DebugLoc DL = sd->getDebugLoc();
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MachineInstr *MI;
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if (VReg) {
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MI = BuildMI(*MF, DL, II).addReg(VReg, RegState::Debug).
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addImm(sd->getOffset()).
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addMetadata(sd->getMDPtr());
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} else {
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// Insert an Undef so we can see what we dropped.
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MI = BuildMI(*MF, DL, II).addReg(0U).addImm(sd->getOffset()).
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addMetadata(sd->getMDPtr());
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}
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MBB->insert(InsertPos, MI);
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}
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/// EmitDbgValue - Generate debug info that does not refer to a SDNode.
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void
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InstrEmitter::EmitDbgValue(SDDbgValue *sd,
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/// EmitDbgValue - Generate machine instruction for a dbg_value node.
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///
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MachineInstr *InstrEmitter::EmitDbgValue(SDDbgValue *SD,
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MachineBasicBlock *InsertBB,
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DenseMap<SDValue, unsigned> &VRBaseMap,
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DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) {
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if (!sd)
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return;
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uint64_t Offset = SD->getOffset();
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MDNode* MDPtr = SD->getMDPtr();
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DebugLoc DL = SD->getDebugLoc();
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const TargetInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
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uint64_t Offset = sd->getOffset();
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MDNode* mdPtr = sd->getMDPtr();
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SDDbgValue::DbgValueKind kind = sd->getKind();
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DebugLoc DL = sd->getDebugLoc();
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MachineInstr* MI;
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if (kind == SDDbgValue::CONST) {
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Value *V = sd->getConst();
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MachineInstrBuilder MIB = BuildMI(*MF, DL, II);
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if (SD->getKind() == SDDbgValue::SDNODE) {
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AddOperand(&*MIB, SDValue(SD->getSDNode(), SD->getResNo()),
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(*MIB).getNumOperands(), &II, VRBaseMap, true /*IsDebug*/);
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} else if (SD->getKind() == SDDbgValue::CONST) {
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Value *V = SD->getConst();
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if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
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MI = BuildMI(*MF, DL, II).addImm(CI->getZExtValue()).
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addImm(Offset).addMetadata(mdPtr);
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MIB.addImm(CI->getSExtValue());
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} else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
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MI = BuildMI(*MF, DL, II).addFPImm(CF).
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addImm(Offset).addMetadata(mdPtr);
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MIB.addFPImm(CF);
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} else {
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// Could be an Undef. In any case insert an Undef so we can see what we
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// dropped.
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MI = BuildMI(*MF, DL, II).addReg(0U).
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addImm(Offset).addMetadata(mdPtr);
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MIB.addReg(0U);
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}
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} else if (kind == SDDbgValue::FRAMEIX) {
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unsigned FrameIx = sd->getFrameIx();
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} else if (SD->getKind() == SDDbgValue::FRAMEIX) {
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unsigned FrameIx = SD->getFrameIx();
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// Stack address; this needs to be lowered in target-dependent fashion.
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// FIXME test that the target supports this somehow; if not emit Undef.
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// Create a pseudo for EmitInstrWithCustomInserter's consumption.
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MI = BuildMI(*MF, DL, II).addImm(FrameIx).
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addImm(Offset).addMetadata(mdPtr);
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MBB = TLI->EmitInstrWithCustomInserter(MI, MBB, EM);
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InsertPos = MBB->end();
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return;
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MIB.addImm(FrameIx).addImm(Offset).addMetadata(MDPtr);
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abort();
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TLI->EmitInstrWithCustomInserter(&*MIB, InsertBB, EM);
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return 0;
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} else {
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// Insert an Undef so we can see what we dropped.
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MI = BuildMI(*MF, DL, II).addReg(0U).
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addImm(Offset).addMetadata(mdPtr);
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MIB.addReg(0U);
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}
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MBB->insert(InsertPos, MI);
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MIB.addImm(Offset).addMetadata(MDPtr);
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return &*MIB;
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}
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/// EmitNode - Generate machine code for a node and needed dependencies.
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@ -64,7 +64,8 @@ class InstrEmitter {
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void AddRegisterOperand(MachineInstr *MI, SDValue Op,
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unsigned IIOpNum,
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const TargetInstrDesc *II,
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DenseMap<SDValue, unsigned> &VRBaseMap);
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DenseMap<SDValue, unsigned> &VRBaseMap,
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bool IsDebug = false);
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/// AddOperand - Add the specified operand to the specified machine instr. II
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/// specifies the instruction information for the node, and IIOpNum is the
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@ -73,7 +74,8 @@ class InstrEmitter {
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void AddOperand(MachineInstr *MI, SDValue Op,
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unsigned IIOpNum,
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const TargetInstrDesc *II,
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DenseMap<SDValue, unsigned> &VRBaseMap);
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DenseMap<SDValue, unsigned> &VRBaseMap,
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bool IsDebug = false);
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/// EmitSubregNode - Generate machine code for subreg nodes.
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///
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@ -98,16 +100,12 @@ public:
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/// MachineInstr.
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static unsigned CountOperands(SDNode *Node);
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/// EmitDbgValue - Generate any debug info that refers to this Node. Constant
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/// dbg_value is not handled here.
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void EmitDbgValue(SDNode *Node,
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DenseMap<SDValue, unsigned> &VRBaseMap,
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SDDbgValue* sd);
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/// EmitDbgValue - Generate a constant DBG_VALUE. No node is involved.
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void EmitDbgValue(SDDbgValue* sd,
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DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
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/// EmitDbgValue - Generate machine instruction for a dbg_value node.
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///
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MachineInstr *EmitDbgValue(SDDbgValue *SD,
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MachineBasicBlock *InsertBB,
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DenseMap<SDValue, unsigned> &VRBaseMap,
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DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
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/// EmitNode - Generate machine code for a node and needed dependencies.
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///
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@ -47,10 +47,12 @@ private:
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uint64_t Offset;
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DebugLoc DL;
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unsigned Order;
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bool Invalid;
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public:
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// Constructor for non-constants.
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SDDbgValue(MDNode *mdP, SDNode *N, unsigned R, uint64_t off, DebugLoc dl,
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unsigned O) : mdPtr(mdP), Offset(off), DL(dl), Order(O) {
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unsigned O) : mdPtr(mdP), Offset(off), DL(dl), Order(O),
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Invalid(false) {
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kind = SDNODE;
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u.s.Node = N;
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u.s.ResNo = R;
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@ -97,6 +99,12 @@ public:
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// Returns the SDNodeOrder. This is the order of the preceding node in the
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// input.
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unsigned getOrder() { return Order; }
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// setIsInvalidated / isInvalidated - Setter / getter of the "Invalidated"
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// property. A SDDbgValue is invalid if the SDNode that produces the value is
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// deleted.
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void setIsInvalidated() { Invalid = true; }
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bool isInvalidated() { return Invalid; }
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};
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} // end llvm namespace
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@ -23,6 +23,7 @@
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#include "llvm/Target/TargetSubtarget.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/Debug.h"
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@ -407,19 +408,67 @@ void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
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}
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}
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namespace {
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struct OrderSorter {
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bool operator()(const std::pair<unsigned, MachineInstr*> &A,
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const std::pair<unsigned, MachineInstr*> &B) {
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return A.first < B.first;
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}
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};
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}
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// ProcessSourceNode - Process nodes with source order numbers. These are added
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// to a vector which EmitSchedule use to determine how to insert dbg_value
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// instructions in the right order.
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static void ProcessSourceNode(SDNode *N, SelectionDAG *DAG,
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InstrEmitter &Emitter,
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DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM,
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DenseMap<SDValue, unsigned> &VRBaseMap,
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SmallVector<std::pair<unsigned, MachineInstr*>, 32> &Orders,
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SmallSet<unsigned, 8> &Seen) {
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unsigned Order = DAG->GetOrdering(N);
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if (!Order || !Seen.insert(Order))
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return;
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MachineBasicBlock *BB = Emitter.getBlock();
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if (BB->empty() || BB->back().isPHI()) {
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// Did not insert any instruction.
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Orders.push_back(std::make_pair(Order, (MachineInstr*)0));
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return;
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}
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Orders.push_back(std::make_pair(Order, &BB->back()));
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if (!N->getHasDebugValue())
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return;
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// Opportunistically insert immediate dbg_value uses, i.e. those with source
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// order number right after the N.
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MachineBasicBlock::iterator InsertPos = Emitter.getInsertPos();
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SmallVector<SDDbgValue*,2> &DVs = DAG->GetDbgValues(N);
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for (unsigned i = 0, e = DVs.size(); i != e; ++i) {
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if (DVs[i]->isInvalidated())
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continue;
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unsigned DVOrder = DVs[i]->getOrder();
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if (DVOrder == ++Order) {
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// FIXME: If the source node with next higher order is scheduled before
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// this could end up generating funky debug info.
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MachineInstr *DbgMI = Emitter.EmitDbgValue(DVs[i], BB, VRBaseMap, EM);
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Orders.push_back(std::make_pair(DVOrder, DbgMI));
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BB->insert(InsertPos, DbgMI);
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DVs[i]->setIsInvalidated();
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}
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}
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}
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/// EmitSchedule - Emit the machine code in scheduled order.
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MachineBasicBlock *ScheduleDAGSDNodes::
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EmitSchedule(DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) {
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InstrEmitter Emitter(BB, InsertPos);
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DenseMap<SDValue, unsigned> VRBaseMap;
|
||||
DenseMap<SUnit*, unsigned> CopyVRBaseMap;
|
||||
|
||||
// For now, any constant debug info nodes go at the beginning.
|
||||
for (SDDbgInfo::ConstDbgIterator I = DAG->DbgConstBegin(),
|
||||
E = DAG->DbgConstEnd(); I!=E; I++) {
|
||||
Emitter.EmitDbgValue(*I, EM);
|
||||
delete *I;
|
||||
}
|
||||
SmallVector<std::pair<unsigned, MachineInstr*>, 32> Orders;
|
||||
SmallSet<unsigned, 8> Seen;
|
||||
bool HasDbg = DAG->hasDebugValues();
|
||||
|
||||
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
|
||||
SUnit *SU = Sequence[i];
|
||||
@ -442,22 +491,72 @@ EmitSchedule(DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) {
|
||||
N = N->getFlaggedNode())
|
||||
FlaggedNodes.push_back(N);
|
||||
while (!FlaggedNodes.empty()) {
|
||||
SDNode *N = FlaggedNodes.back();
|
||||
Emitter.EmitNode(FlaggedNodes.back(), SU->OrigNode != SU, SU->isCloned,
|
||||
VRBaseMap, EM);
|
||||
if (FlaggedNodes.back()->getHasDebugValue())
|
||||
if (SDDbgValue *sd = DAG->GetDbgInfo(FlaggedNodes.back())) {
|
||||
Emitter.EmitDbgValue(FlaggedNodes.back(), VRBaseMap, sd);
|
||||
delete sd;
|
||||
}
|
||||
// Remember the the source order of the inserted instruction.
|
||||
if (HasDbg)
|
||||
ProcessSourceNode(N, DAG, Emitter, EM, VRBaseMap, Orders, Seen);
|
||||
FlaggedNodes.pop_back();
|
||||
}
|
||||
Emitter.EmitNode(SU->getNode(), SU->OrigNode != SU, SU->isCloned,
|
||||
VRBaseMap, EM);
|
||||
if (SU->getNode()->getHasDebugValue())
|
||||
if (SDDbgValue *sd = DAG->GetDbgInfo(SU->getNode())) {
|
||||
Emitter.EmitDbgValue(SU->getNode(), VRBaseMap, sd);
|
||||
delete sd;
|
||||
// Remember the the source order of the inserted instruction.
|
||||
if (HasDbg)
|
||||
ProcessSourceNode(SU->getNode(), DAG, Emitter, EM, VRBaseMap, Orders,
|
||||
Seen);
|
||||
}
|
||||
|
||||
// Insert all the dbg_value which have not already been inserted in source
|
||||
// order sequence.
|
||||
if (HasDbg) {
|
||||
MachineBasicBlock::iterator BBBegin = BB->empty() ? BB->end() : BB->begin();
|
||||
while (BBBegin != BB->end() && BBBegin->isPHI())
|
||||
++BBBegin;
|
||||
|
||||
// Sort the source order instructions and use the order to insert debug
|
||||
// values.
|
||||
std::sort(Orders.begin(), Orders.end(), OrderSorter());
|
||||
|
||||
SDDbgInfo::DbgIterator DI = DAG->DbgBegin();
|
||||
SDDbgInfo::DbgIterator DE = DAG->DbgEnd();
|
||||
// Now emit the rest according to source order.
|
||||
unsigned LastOrder = 0;
|
||||
MachineInstr *LastMI = 0;
|
||||
for (unsigned i = 0, e = Orders.size(); i != e && DI != DE; ++i) {
|
||||
unsigned Order = Orders[i].first;
|
||||
MachineInstr *MI = Orders[i].second;
|
||||
// Insert all SDDbgValue's whose order(s) are before "Order".
|
||||
if (!MI)
|
||||
continue;
|
||||
MachineBasicBlock *MIBB = MI->getParent();
|
||||
for (; DI != DE &&
|
||||
(*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) {
|
||||
if ((*DI)->isInvalidated())
|
||||
continue;
|
||||
MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, MIBB, VRBaseMap, EM);
|
||||
if (!LastOrder)
|
||||
// Insert to start of the BB (after PHIs).
|
||||
BB->insert(BBBegin, DbgMI);
|
||||
else {
|
||||
MachineBasicBlock::iterator Pos = MI;
|
||||
MIBB->insert(llvm::next(Pos), DbgMI);
|
||||
}
|
||||
}
|
||||
LastOrder = Order;
|
||||
LastMI = MI;
|
||||
}
|
||||
// Add trailing DbgValue's before the terminator. FIXME: May want to add
|
||||
// some of them before one or more conditional branches?
|
||||
while (DI != DE) {
|
||||
MachineBasicBlock *InsertBB = Emitter.getBlock();
|
||||
MachineBasicBlock::iterator Pos= Emitter.getBlock()->getFirstTerminator();
|
||||
if (!(*DI)->isInvalidated()) {
|
||||
MachineInstr *DbgMI= Emitter.EmitDbgValue(*DI, InsertBB, VRBaseMap, EM);
|
||||
InsertBB->insert(Pos, DbgMI);
|
||||
}
|
||||
++DI;
|
||||
}
|
||||
}
|
||||
|
||||
BB = Emitter.getBlock();
|
||||
|
||||
@ -598,8 +598,10 @@ void SelectionDAG::DeallocateNode(SDNode *N) {
|
||||
// Remove the ordering of this node.
|
||||
Ordering->remove(N);
|
||||
|
||||
// And its entry in the debug info table, if any.
|
||||
DbgInfo->remove(N);
|
||||
// If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
|
||||
SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
|
||||
for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
|
||||
DbgVals[i]->setIsInvalidated();
|
||||
}
|
||||
|
||||
/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
|
||||
@ -811,6 +813,7 @@ void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
|
||||
SelectionDAG::~SelectionDAG() {
|
||||
allnodes_clear();
|
||||
delete Ordering;
|
||||
DbgInfo->clear();
|
||||
delete DbgInfo;
|
||||
}
|
||||
|
||||
@ -5241,24 +5244,12 @@ unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
|
||||
return Ordering->getOrder(SD);
|
||||
}
|
||||
|
||||
/// AssignDbgInfo - Assign debug info to the SDNode.
|
||||
void SelectionDAG::AssignDbgInfo(SDNode* SD, SDDbgValue* db) {
|
||||
assert(SD && "Trying to assign dbg info to a null node!");
|
||||
DbgInfo->add(SD, db);
|
||||
SD->setHasDebugValue(true);
|
||||
}
|
||||
|
||||
/// RememberDbgInfo - Remember debug info which is not assigned to an SDNode.
|
||||
void SelectionDAG::RememberDbgInfo(SDDbgValue* db) {
|
||||
DbgInfo->add(db);
|
||||
}
|
||||
|
||||
/// GetDbgInfo - Get the debug info, if any, for the SDNode.
|
||||
SDDbgValue* SelectionDAG::GetDbgInfo(const SDNode *SD) {
|
||||
assert(SD && "Trying to get the order of a null node!");
|
||||
if (SD->getHasDebugValue())
|
||||
return DbgInfo->getSDDbgValue(SD);
|
||||
return 0;
|
||||
/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
|
||||
/// value is produced by SD.
|
||||
void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) {
|
||||
DbgInfo->add(DB, SD);
|
||||
if (SD)
|
||||
SD->setHasDebugValue(true);
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
@ -3825,20 +3825,20 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
|
||||
++SDNodeOrder;
|
||||
if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
|
||||
SDDbgValue* dv = new SDDbgValue(Variable, V, Offset, dl, SDNodeOrder);
|
||||
DAG.RememberDbgInfo(dv);
|
||||
DAG.AddDbgValue(dv);
|
||||
} else {
|
||||
SDValue &N = NodeMap[V];
|
||||
if (N.getNode()) {
|
||||
SDDbgValue *dv = new SDDbgValue(Variable, N.getNode(),
|
||||
N.getResNo(), Offset, dl, SDNodeOrder);
|
||||
DAG.AssignDbgInfo(N.getNode(), dv);
|
||||
DAG.AddDbgValue(dv, N.getNode());
|
||||
} else {
|
||||
// We may expand this to cover more cases. One case where we have no
|
||||
// data available is an unreferenced parameter; we need this fallback.
|
||||
SDDbgValue* dv = new SDDbgValue(Variable,
|
||||
UndefValue::get(V->getType()),
|
||||
Offset, dl, SDNodeOrder);
|
||||
DAG.RememberDbgInfo(dv);
|
||||
DAG.AddDbgValue(dv);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user