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Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162088 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-08-17 06:55:11 +00:00
parent 3ec64468b0
commit c087870c47
2 changed files with 30 additions and 19 deletions
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46
lib/Target/X86/X86ISelLowering.cpp
View File

@ -11202,9 +11202,9 @@ static void ReplaceATOMIC_LOAD(SDNode *Node,
Results.push_back(Swap.getValue(1));
}
void X86TargetLowering::
static void
ReplaceATOMIC_BINARY_64(SDNode *Node, SmallVectorImpl<SDValue>&Results,
SelectionDAG &DAG, unsigned NewOp) const {
SelectionDAG &DAG, unsigned NewOp) {
DebugLoc dl = Node->getDebugLoc();
assert (Node->getValueType(0) == MVT::i64 &&
"Only know how to expand i64 atomics");
@ -11325,26 +11325,40 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
return;
}
case ISD::ATOMIC_LOAD_ADD:
ReplaceATOMIC_BINARY_64(N, Results, DAG, X86ISD::ATOMADD64_DAG);
return;
case ISD::ATOMIC_LOAD_AND:
ReplaceATOMIC_BINARY_64(N, Results, DAG, X86ISD::ATOMAND64_DAG);
return;
case ISD::ATOMIC_LOAD_NAND:
ReplaceATOMIC_BINARY_64(N, Results, DAG, X86ISD::ATOMNAND64_DAG);
return;
case ISD::ATOMIC_LOAD_OR:
ReplaceATOMIC_BINARY_64(N, Results, DAG, X86ISD::ATOMOR64_DAG);
return;
case ISD::ATOMIC_LOAD_SUB:
ReplaceATOMIC_BINARY_64(N, Results, DAG, X86ISD::ATOMSUB64_DAG);
return;
case ISD::ATOMIC_LOAD_XOR:
ReplaceATOMIC_BINARY_64(N, Results, DAG, X86ISD::ATOMXOR64_DAG);
return;
case ISD::ATOMIC_SWAP:
ReplaceATOMIC_BINARY_64(N, Results, DAG, X86ISD::ATOMSWAP64_DAG);
case ISD::ATOMIC_SWAP: {
unsigned Opc;
switch (N->getOpcode()) {
default: llvm_unreachable("Unexpected opcode");
case ISD::ATOMIC_LOAD_ADD:
Opc = X86ISD::ATOMADD64_DAG;
break;
case ISD::ATOMIC_LOAD_AND:
Opc = X86ISD::ATOMAND64_DAG;
break;
case ISD::ATOMIC_LOAD_NAND:
Opc = X86ISD::ATOMNAND64_DAG;
break;
case ISD::ATOMIC_LOAD_OR:
Opc = X86ISD::ATOMOR64_DAG;
break;
case ISD::ATOMIC_LOAD_SUB:
Opc = X86ISD::ATOMSUB64_DAG;
break;
case ISD::ATOMIC_LOAD_XOR:
Opc = X86ISD::ATOMXOR64_DAG;
break;
case ISD::ATOMIC_SWAP:
Opc = X86ISD::ATOMSWAP64_DAG;
break;
}
ReplaceATOMIC_BINARY_64(N, Results, DAG, Opc);
return;
}
case ISD::ATOMIC_LOAD:
ReplaceATOMIC_LOAD(N, Results, DAG);
}

3
lib/Target/X86/X86ISelLowering.h
View File

@ -864,9 +864,6 @@ namespace llvm {
const SmallVectorImpl<ISD::OutputArg> &Outs,
LLVMContext &Context) const;
void ReplaceATOMIC_BINARY_64(SDNode *N, SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG, unsigned NewOp) const;
/// Utility function to emit string processing sse4.2 instructions
/// that return in xmm0.
/// This takes the instruction to expand, the associated machine basic