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Add support for "m" inline asm constraints.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28728 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2006-06-08 18:03:49 +00:00
parent fd561cded3
commit c0bad5706e
1 changed files with 29 additions and 1 deletions
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30
lib/Target/X86/X86ISelDAGToDAG.cpp
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@@ -128,7 +128,13 @@ namespace {
bool TryFoldLoad(SDOperand P, SDOperand N,
SDOperand &Base, SDOperand &Scale,
SDOperand &Index, SDOperand &Disp);
/// SelectInlineAsmMemoryOperand - Implement addressing mode selection for
/// inline asm expressions.
virtual bool SelectInlineAsmMemoryOperand(const SDOperand &Op,
char ConstraintCode,
std::vector<SDOperand> &OutOps,
SelectionDAG &DAG);
void EmitSpecialCodeForMain(MachineBasicBlock *BB, MachineFrameInfo *MFI);
inline void getAddressOperands(X86ISelAddressMode &AM, SDOperand &Base,
@@ -876,6 +882,28 @@ void X86DAGToDAGISel::Select(SDOperand &Result, SDOperand N) {
#endif
}
bool X86DAGToDAGISel::
SelectInlineAsmMemoryOperand(const SDOperand &Op, char ConstraintCode,
std::vector<SDOperand> &OutOps, SelectionDAG &DAG){
SDOperand Op0, Op1, Op2, Op3;
switch (ConstraintCode) {
case 'o': // offsetable ??
case 'v': // not offsetable ??
default: return true;
case 'm': // memory
if (!SelectAddr(Op, Op0, Op1, Op2, Op3))
return true;
break;
}
OutOps.resize(4);
Select(OutOps[0], Op0);
Select(OutOps[1], Op1);
Select(OutOps[2], Op2);
Select(OutOps[3], Op3);
return false;
}
/// createX86ISelDag - This pass converts a legalized DAG into a
/// X86-specific DAG, ready for instruction scheduling.
///