diff --git a/lib/Target/PowerPC/PPC64.h b/lib/Target/PowerPC/PPC64.h
new file mode 100644
index 00000000000..2cfcb5d3ea2
--- /dev/null
+++ b/lib/Target/PowerPC/PPC64.h
@@ -0,0 +1,20 @@
+//===-- PPC64.h - Top-level interface for AIX/PowerPC -------------*- C++ -*-//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
+//
+// This file contains the entry points for global functions defined in the LLVM
+// PowerPC 64-bit back-end.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef TARGET_POWERPC_AIX_H
+#define TARGET_POWERPC_AIX_H
+
+#include "PowerPC.h"
+
+#endif
diff --git a/lib/Target/PowerPC/PPC64CodeEmitter.cpp b/lib/Target/PowerPC/PPC64CodeEmitter.cpp
new file mode 100644
index 00000000000..f2256a19c46
--- /dev/null
+++ b/lib/Target/PowerPC/PPC64CodeEmitter.cpp
@@ -0,0 +1,44 @@
+//===-- PPC64CodeEmitter.cpp - JIT Code Emitter for PPC64 -----*- C++ -*-=//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
+// 
+//
+//===----------------------------------------------------------------------===//
+
+#include "PPC64JITInfo.h"
+#include "PPC64TargetMachine.h"
+
+namespace llvm {
+
+/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
+/// machine code emitted.  This uses a MachineCodeEmitter object to handle
+/// actually outputting the machine code and resolving things like the address
+/// of functions.  This method should returns true if machine code emission is
+/// not supported.
+///
+bool PPC64TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
+                                                     MachineCodeEmitter &MCE) {
+  return true;
+  // It should go something like this:
+  // PM.add(new Emitter(MCE));  // Machine code emitter pass for PPC64
+  // Delete machine code for this function after emitting it:
+  // PM.add(createMachineCodeDeleter());
+}
+
+void *PPC64JITInfo::getJITStubForFunction(Function *F,
+                                           MachineCodeEmitter &MCE) {
+  assert (0 && "PPC64JITInfo::getJITStubForFunction not implemented");
+  return 0;
+}
+
+void PPC64JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
+  assert (0 && "PPC64JITInfo::replaceMachineCodeForFunction not implemented");
+}
+
+} // end llvm namespace
+
diff --git a/lib/Target/PowerPC/PPC64JITInfo.h b/lib/Target/PowerPC/PPC64JITInfo.h
new file mode 100644
index 00000000000..c18b01511e2
--- /dev/null
+++ b/lib/Target/PowerPC/PPC64JITInfo.h
@@ -0,0 +1,47 @@
+//===- PPC64JITInfo.h - PowerPC/AIX impl. of the JIT interface -*- C++ -*-===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
+//
+// This file contains the PowerPC/AIX implementation of the TargetJITInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef POWERPC_AIX_JITINFO_H
+#define POWERPC_AIX_JITINFO_H
+
+#include "PowerPCJITInfo.h"
+
+namespace llvm {
+  class TargetMachine;
+
+  class PPC64JITInfo : public PowerPCJITInfo {
+  public:
+    PPC64JITInfo(TargetMachine &tm) : PowerPCJITInfo(tm) {}
+
+    /// addPassesToJITCompile - Add passes to the specified pass manager to
+    /// implement a fast dynamic compiler for this target.  Return true if this
+    /// is not supported for this target.
+    ///
+    virtual void addPassesToJITCompile(FunctionPassManager &PM);
+    
+    /// replaceMachineCodeForFunction - Make it so that calling the function
+    /// whose machine code is at OLD turns into a call to NEW, perhaps by
+    /// overwriting OLD with a branch to NEW.  This is used for self-modifying
+    /// code.
+    ///
+    virtual void replaceMachineCodeForFunction(void *Old, void *New);
+    
+    /// getJITStubForFunction - Create or return a stub for the specified
+    /// function.  This stub acts just like the specified function, except that
+    /// it allows the "address" of the function to be taken without having to
+    /// generate code for it.
+    virtual void *getJITStubForFunction(Function *F, MachineCodeEmitter &MCE);
+  };
+}
+
+#endif
diff --git a/lib/Target/PowerPC/PPC64TargetMachine.cpp b/lib/Target/PowerPC/PPC64TargetMachine.cpp
new file mode 100644
index 00000000000..1f11268e93d
--- /dev/null
+++ b/lib/Target/PowerPC/PPC64TargetMachine.cpp
@@ -0,0 +1,117 @@
+//===-- PPC64TargetMachine.cpp - Define TargetMachine for AIX/PowerPC ----===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
+// 
+//
+//===----------------------------------------------------------------------===//
+
+#include "PowerPC.h"
+#include "PPC64JITInfo.h"
+#include "PPC64TargetMachine.h"
+#include "llvm/Module.h"
+#include "llvm/PassManager.h"
+#include "llvm/CodeGen/IntrinsicLowering.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Transforms/Scalar.h"
+#include <iostream>
+using namespace llvm;
+
+namespace {
+  const std::string PPC64 = "AIX/PowerPC";
+  // Register the target
+  RegisterTarget<PPC64TargetMachine> 
+  X("powerpc-aix", "  AIX/PowerPC (experimental)");
+}
+
+/// PPC64TargetMachine ctor
+///
+PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
+  // FIXME: this is wrong!
+  : PowerPCTargetMachine(PPC64, IL,
+                         TargetData(PPC64,false,8,4,4,4,4,4,2,1,4),
+                         TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,-4),
+                         PPC64JITInfo(*this)) {}
+
+/// addPassesToEmitAssembly - Add passes to the specified pass manager
+/// to implement a static compiler for this target.
+///
+bool PPC64TargetMachine::addPassesToEmitAssembly(PassManager &PM,
+                                                  std::ostream &Out) {
+  // FIXME: Implement efficient support for garbage collection intrinsics.
+  PM.add(createLowerGCPass());
+
+  // FIXME: Implement the invoke/unwind instructions!
+  PM.add(createLowerInvokePass());
+
+  // FIXME: Implement the switch instruction in the instruction selector!
+  PM.add(createLowerSwitchPass());
+
+  PM.add(createLowerConstantExpressionsPass());
+
+  // Make sure that no unreachable blocks are instruction selected.
+  PM.add(createUnreachableBlockEliminationPass());
+
+  // FIXME: instruction selector!
+  //PM.add(createPPCSimpleInstructionSelector(*this));
+
+  if (PrintMachineCode)
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
+  PM.add(createRegisterAllocator());
+
+  if (PrintMachineCode)
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
+  // I want a PowerPC specific prolog/epilog code inserter so I can put the 
+  // fills/spills in the right spots.
+  //PM.add(createPowerPCPEI());
+  
+  // Must run branch selection immediately preceding the printer
+  //PM.add(createPPCBranchSelectionPass());
+  //PM.add(createPPC32AsmPrinterPass(Out, *this));
+  PM.add(createMachineCodeDeleter());
+  return false;
+}
+
+/// addPassesToJITCompile - Add passes to the specified pass manager to
+/// implement a fast dynamic compiler for this target.
+///
+void PPC64JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
+  // FIXME: Implement efficient support for garbage collection intrinsics.
+  PM.add(createLowerGCPass());
+
+  // FIXME: Implement the invoke/unwind instructions!
+  PM.add(createLowerInvokePass());
+
+  // FIXME: Implement the switch instruction in the instruction selector!
+  PM.add(createLowerSwitchPass());
+
+  PM.add(createLowerConstantExpressionsPass());
+
+  // Make sure that no unreachable blocks are instruction selected.
+  PM.add(createUnreachableBlockEliminationPass());
+
+  // FIXME: ISel
+  //PM.add(createPPCSimpleInstructionSelector(TM));
+  PM.add(createRegisterAllocator());
+  PM.add(createPrologEpilogCodeInserter());
+}
+
+unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
+  if (M.getEndianness()  == Module::BigEndian &&
+      M.getPointerSize() == Module::Pointer64)
+    return 10;                                   // Direct match
+  else if (M.getEndianness() != Module::AnyEndianness ||
+           M.getPointerSize() != Module::AnyPointerSize)
+    return 0;                                    // Match for some other target
+
+  return getJITMatchQuality()/2;
+}
diff --git a/lib/Target/PowerPC/PPC64TargetMachine.h b/lib/Target/PowerPC/PPC64TargetMachine.h
new file mode 100644
index 00000000000..d0bac8cba33
--- /dev/null
+++ b/lib/Target/PowerPC/PPC64TargetMachine.h
@@ -0,0 +1,41 @@
+//===-- PPC64TargetMachine.h - Define AIX/PowerPC TargetMachine --*- C++ -*-=//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
+// 
+// This file declares the PowerPC/AIX specific subclass of TargetMachine.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef POWERPC_AIX_TARGETMACHINE_H
+#define POWERPC_AIX_TARGETMACHINE_H
+
+#include "PowerPCTargetMachine.h"
+
+namespace llvm {
+
+class PPC64TargetMachine : public PowerPCTargetMachine {
+public:
+  PPC64TargetMachine(const Module &M, IntrinsicLowering *IL);
+
+  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
+  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
+  /// actually outputting the machine code and resolving things like the address
+  /// of functions.  This method should returns true if machine code emission is
+  /// not supported.
+  ///
+  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
+                                          MachineCodeEmitter &MCE);
+  
+  virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
+
+  static unsigned getModuleMatchQuality(const Module &M);
+};
+
+} // end namespace llvm
+
+#endif