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https://github.com/c64scene-ar/llvm-6502.git
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[mips] Fix handling of instructions which copy to/from accumulator registers.
Expand copy instructions between two accumulator registers before callee-saved scan is done. Handle copies between integer GPR and hi/lo registers in MipsSEInstrInfo::copyPhysReg. Delete pseudo-copy instructions that are not needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180827 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -42,7 +42,7 @@ private:
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bool expandInstr(MachineBasicBlock &MBB, Iter I);
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void expandLoad(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
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void expandStore(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
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void expandCopy(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
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bool expandCopy(MachineBasicBlock &MBB, Iter I);
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MachineFunction &MF;
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const MipsSEInstrInfo &TII;
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@@ -89,12 +89,9 @@ bool ExpandACCPseudo::expandInstr(MachineBasicBlock &MBB, Iter I) {
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case Mips::STORE_AC128_P8:
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expandStore(MBB, I, 8);
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break;
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case Mips::COPY_AC64:
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case Mips::COPY_AC_DSP:
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expandCopy(MBB, I, 4);
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break;
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case Mips::COPY_AC128:
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expandCopy(MBB, I, 8);
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case TargetOpcode::COPY:
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if (!expandCopy(MBB, I))
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return false;
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break;
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default:
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return false;
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@@ -152,8 +149,19 @@ void ExpandACCPseudo::expandStore(MachineBasicBlock &MBB, Iter I,
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TII.storeRegToStack(MBB, I, VR1, true, FI, RC, &RegInfo, RegSize);
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}
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void ExpandACCPseudo::expandCopy(MachineBasicBlock &MBB, Iter I,
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unsigned RegSize) {
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bool ExpandACCPseudo::expandCopy(MachineBasicBlock &MBB, Iter I) {
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unsigned Dst = I->getOperand(0).getReg(), Src = I->getOperand(1).getReg();
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unsigned RegSize;
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if (Mips::ACRegsDSPRegClass.contains(Dst) &&
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Mips::ACRegsDSPRegClass.contains(Src))
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RegSize = 4;
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else if (Mips::ACRegs128RegClass.contains(Dst) &&
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Mips::ACRegs128RegClass.contains(Src))
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RegSize = 8;
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else
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return false;
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// copy $vr0, src_lo
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// copy dst_lo, $vr0
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// copy $vr1, src_hi
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@@ -162,7 +170,6 @@ void ExpandACCPseudo::expandCopy(MachineBasicBlock &MBB, Iter I,
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const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize);
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unsigned VR0 = MRI.createVirtualRegister(RC);
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unsigned VR1 = MRI.createVirtualRegister(RC);
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unsigned Dst = I->getOperand(0).getReg(), Src = I->getOperand(1).getReg();
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unsigned SrcKill = getKillRegState(I->getOperand(1).isKill());
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unsigned DstLo = RegInfo.getSubReg(Dst, Mips::sub_lo);
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unsigned DstHi = RegInfo.getSubReg(Dst, Mips::sub_hi);
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@@ -176,6 +183,7 @@ void ExpandACCPseudo::expandCopy(MachineBasicBlock &MBB, Iter I,
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BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), VR1).addReg(SrcHi, SrcKill);
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BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstHi)
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.addReg(VR1, RegState::Kill);
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return true;
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}
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unsigned MipsSEFrameLowering::ehDataReg(unsigned I) const {
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