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Fix 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62518 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1114,8 +1114,8 @@ SDNode *PPCDAGToDAGISel::Select(SDValue Op) {
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N2.getOperand(1).getOpcode() == PPCISD::Lo)
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N2 = N2.getOperand(0).getOperand(1).getOperand(0);
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else if (N2.getOperand(0).getOpcode() == ISD::ADD &&
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N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
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N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Lo &&
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N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
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N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Lo &&
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N2.getOperand(1).getOpcode() == PPCISD::Hi)
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N2 = N2.getOperand(0).getOperand(1).getOperand(0);
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else if (N2.getOperand(0).getOpcode() == PPCISD::Hi &&
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