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Simplify code, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171226 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1733,7 +1733,7 @@ X86TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
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CCInfo.AnalyzeCallResult(Ins, RetCC_X86);
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// Copy all of the result registers out of their specified physreg.
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for (unsigned i = 0; i != RVLocs.size(); ++i) {
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for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) {
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CCValAssign &VA = RVLocs[i];
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EVT CopyVT = VA.getValVT();
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@ -1990,10 +1990,9 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain,
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if (VA.isExtInLoc()) {
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// Handle MMX values passed in XMM regs.
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if (RegVT.isVector()) {
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ArgValue = DAG.getNode(X86ISD::MOVDQ2Q, dl, VA.getValVT(),
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ArgValue);
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} else
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if (RegVT.isVector())
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ArgValue = DAG.getNode(X86ISD::MOVDQ2Q, dl, VA.getValVT(), ArgValue);
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else
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ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
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}
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} else {
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@ -12405,18 +12404,16 @@ bool X86TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
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return false;
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unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
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unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
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if (NumBits1 <= NumBits2)
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return false;
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return true;
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return NumBits1 > NumBits2;
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}
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bool X86TargetLowering::isLegalICmpImmediate(int64_t Imm) const {
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return Imm == (int32_t)Imm;
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return isInt<32>(Imm);
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}
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bool X86TargetLowering::isLegalAddImmediate(int64_t Imm) const {
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// Can also use sub to handle negated immediates.
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return Imm == (int32_t)Imm;
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return isInt<32>(Imm);
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}
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bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
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@ -12424,9 +12421,7 @@ bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
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return false;
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unsigned NumBits1 = VT1.getSizeInBits();
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unsigned NumBits2 = VT2.getSizeInBits();
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if (NumBits1 <= NumBits2)
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return false;
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return true;
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return NumBits1 > NumBits2;
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}
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bool X86TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {
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@ -17553,13 +17548,13 @@ TargetLowering::ConstraintWeight
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case 'f':
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case 't':
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case 'u':
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if (type->isFloatingPointTy())
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weight = CW_SpecificReg;
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break;
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if (type->isFloatingPointTy())
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weight = CW_SpecificReg;
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break;
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case 'y':
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if (type->isX86_MMXTy() && Subtarget->hasMMX())
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weight = CW_SpecificReg;
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break;
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if (type->isX86_MMXTy() && Subtarget->hasMMX())
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weight = CW_SpecificReg;
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break;
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case 'x':
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case 'Y':
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if (((type->getPrimitiveSizeInBits() == 128) && Subtarget->hasSSE1()) ||
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