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The srem -> urem transform is not safe for any divisor that's not a power of two.

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E.g. -5 % 5 is 0 with srem and 1 with urem.

Also addresses Frits van Bommel's comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120049 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2010-11-23 20:33:57 +00:00
parent b6133d1483
commit c21a821e9f
3 changed files with 14 additions and 16 deletions
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4
lib/Target/README.txt
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@ -1704,8 +1704,8 @@ Missed instcombine transformation:
%384 = shl i64 %381, %383 ; [#uses=1]
%385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1]
The srem can be transformed to an and because if x is negative, the shift is
undefined. Testcase derived from 403.gcc.
The srem can be transformed to an and because if %tmp14.i is negative, the
shift is undefined. Testcase derived from 403.gcc.
//===---------------------------------------------------------------------===//

20
lib/Transforms/InstCombine/InstCombineShifts.cpp
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@ -54,19 +54,17 @@ Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
return Res;
// X shift (A srem B) -> X shift (A urem B) iff B is positive.
// X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
// Because shifts by negative values are undefined.
if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op1))
if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) {
// Make sure the divisor's sign bit is zero.
APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits());
if (MaskedValueIsZero(BO->getOperand(1), Mask)) {
Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1),
BO->getName());
I.setOperand(1, URem);
return &I;
}
}
if (BO->hasOneUse() && BO->getOpcode() == Instruction::SRem)
if (ConstantInt *CI = dyn_cast<ConstantInt>(BO->getOperand(1)))
if (CI->getValue().isPowerOf2()) {
Constant *C = ConstantInt::get(BO->getType(), CI->getValue()-1);
Value *Rem = Builder->CreateAnd(BO->getOperand(0), C, BO->getName());
I.setOperand(1, Rem);
return &I;
}
return 0;
}

6
test/Transforms/InstCombine/shift.ll
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@ -443,12 +443,12 @@ entry:
}
define i32 @test38(i32 %x) nounwind readnone {
entry:
%rem = srem i32 %x, 32
%shl = shl i32 1, %rem
ret i32 %shl
; CHECK: @test38
; CHECK-NOT: srem
; CHECK: ret i32
; CHECK-NEXT: and i32 %x, 31
; CHECK-NEXT: shl i32 1
; CHECK-NEXT: ret i32
}