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Add braces to suppress Clang's dangling-else warning.

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These violations were introduced in r191049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191059 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Blaikie 2013-09-20 00:33:11 +00:00
parent 5cfcb3677a
commit c2286720de
1 changed files with 4 additions and 2 deletions
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6
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -3420,7 +3420,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, SDLoc DL) {
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotr x, (sub 32, y)) // (rotr x, (sub 32, y))
if (ConstantSDNode *SUBC = if (ConstantSDNode *SUBC =
dyn_cast<ConstantSDNode>(RExtOp0.getOperand(0))) dyn_cast<ConstantSDNode>(RExtOp0.getOperand(0))) {
if (SUBC->getAPIntValue() == OpSizeInBits) { if (SUBC->getAPIntValue() == OpSizeInBits) {
return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT, return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT,
LHSShiftArg, LHSShiftArg,
@ -3442,6 +3442,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, SDLoc DL) {
return DAG.getNode(LHSShiftArg.getOpcode(), DL, VT, V).getNode(); return DAG.getNode(LHSShiftArg.getOpcode(), DL, VT, V).getNode();
} }
} }
}
} else if (LExtOp0.getOpcode() == ISD::SUB && } else if (LExtOp0.getOpcode() == ISD::SUB &&
RExtOp0 == LExtOp0.getOperand(1)) { RExtOp0 == LExtOp0.getOperand(1)) {
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) -> // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) ->
@ -3449,7 +3450,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, SDLoc DL) {
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) -> // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) ->
// (rotl x, (sub 32, y)) // (rotl x, (sub 32, y))
if (ConstantSDNode *SUBC = if (ConstantSDNode *SUBC =
dyn_cast<ConstantSDNode>(LExtOp0.getOperand(0))) dyn_cast<ConstantSDNode>(LExtOp0.getOperand(0))) {
if (SUBC->getAPIntValue() == OpSizeInBits) { if (SUBC->getAPIntValue() == OpSizeInBits) {
return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT, return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT,
LHSShiftArg, LHSShiftArg,
@ -3473,6 +3474,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, SDLoc DL) {
} }
} }
} }
}
return 0; return 0;
} }