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Fix the Sparc backend with Evan's recent tblgen changes

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26009 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-02-05 08:35:50 +00:00
parent cb0dfba9e1
commit c26017a4ae
1 changed files with 7 additions and 7 deletions
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14
lib/Target/Sparc/SparcISelDAGToDAG.cpp
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@ -983,24 +983,24 @@ bool SparcDAGToDAGISel::SelectADDRri(SDOperand Addr, SDOperand &Base,
// Constant offset from frame ref.
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
} else {
Base = Select(Addr.getOperand(0));
Base = Addr.getOperand(0);
}
Offset = CurDAG->getTargetConstant(CN->getValue(), MVT::i32);
return true;
}
}
if (Addr.getOperand(0).getOpcode() == SPISD::Lo) {
Base = Select(Addr.getOperand(1));
Base = Addr.getOperand(1);
Offset = Addr.getOperand(0).getOperand(0);
return true;
}
if (Addr.getOperand(1).getOpcode() == SPISD::Lo) {
Base = Select(Addr.getOperand(0));
Base = Addr.getOperand(0);
Offset = Addr.getOperand(1).getOperand(0);
return true;
}
}
Base = Select(Addr);
Base = Addr;
Offset = CurDAG->getTargetConstant(0, MVT::i32);
return true;
}
@ -1015,12 +1015,12 @@ bool SparcDAGToDAGISel::SelectADDRrr(SDOperand Addr, SDOperand &R1,
if (Addr.getOperand(0).getOpcode() == SPISD::Lo ||
Addr.getOperand(1).getOpcode() == SPISD::Lo)
return false; // Let the reg+imm pattern catch this!
R1 = Select(Addr.getOperand(0));
R2 = Select(Addr.getOperand(1));
R1 = Addr.getOperand(0);
R2 = Addr.getOperand(1);
return true;
}
R1 = Select(Addr);
R1 = Addr;
R2 = CurDAG->getRegister(SP::G0, MVT::i32);
return true;
}