6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-05 17:39:16 +00:00
Code Issues Projects Releases Wiki Activity

Tidy up.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144244 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-11-10 00:02:33 +00:00
parent a25e292d5f
commit c27f6725b9
1 changed files with 0 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/ARM/ARMInstrInfo.td
View File

@ -4990,18 +4990,6 @@ def : MnemonicAlias<"uqsubaddx", "uqsax">;
// USAX == USUBADDX
def : MnemonicAlias<"usubaddx", "usax">;
// LDRSBT/LDRHT/LDRSHT post-index offset if optional.
// Note that the write-back output register is a dummy operand for MC (it's
// only meaningful for codegen), so we just pass zero here.
// FIXME: tblgen not cooperating with argument conversions.
//def : InstAlias<"ldrsbt${p} $Rt, $addr",
// (LDRSBTi GPR:$Rt, GPR:$Rt, addr_offset_none:$addr, 0,pred:$p)>;
//def : InstAlias<"ldrht${p} $Rt, $addr",
// (LDRHTi GPR:$Rt, GPR:$Rt, addr_offset_none:$addr, 0, pred:$p)>;
//def : InstAlias<"ldrsht${p} $Rt, $addr",
// (LDRSHTi GPR:$Rt, GPR:$Rt, addr_offset_none:$addr, 0, pred:$p)>;
// "mov Rd, so_imm_not" can be handled via "mvn" in assembly, just like
// for isel.
def : ARMInstAlias<"mov${s}${p} $Rd, $imm",