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Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37121 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2007-05-16 20:56:08 +00:00
parent 75604f81b7
commit c3a289c4b5
2 changed files with 18 additions and 14 deletions
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8
lib/CodeGen/MachineInstr.cpp
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@@ -184,6 +184,10 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
}
}
bool MachineInstr::isPredicable() const {
return TID->Flags & M_PREDICABLE;
}
/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
/// the specific register or -1 if it is not found. It further tightening
/// the search criteria to a use that kills the register if isKill is true.
@@ -212,7 +216,7 @@ MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
// is used to represent the predicate.
MachineOperand *MachineInstr::findFirstPredOperand() {
const TargetInstrDescriptor *TID = getInstrDescriptor();
if (TID->Flags & M_PREDICATED) {
if (TID->Flags & M_PREDICABLE) {
for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
return &getOperand(i);
@@ -244,7 +248,7 @@ void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
/// copyPredicates - Copies predicate operand(s) from MI.
void MachineInstr::copyPredicates(const MachineInstr *MI) {
const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
if (TID->Flags & M_PREDICATED) {
if (TID->Flags & M_PREDICABLE) {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
const MachineOperand &MO = MI->getOperand(i);