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R600/SI: remove shader type intrinsic

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Just encode the type as target specific attribute.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176622 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Christian Konig 2013-03-07 09:03:46 +00:00
parent 204a2d32ba
commit c3c169c884
6 changed files with 18 additions and 18 deletions
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7
lib/Target/R600/AMDGPUInstructions.td
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@ -132,13 +132,6 @@ class FNEG <RegisterClass rc> : AMDGPUShaderInst <
[(set rc:$dst, (fneg rc:$src0))]
>;
def SHADER_TYPE : AMDGPUShaderInst <
(outs),
(ins i32imm:$type),
"SHADER_TYPE $type",
[(int_AMDGPU_shader_type imm:$type)]
>;
} // usesCustomInserter = 1
multiclass RegisterLoadStore <RegisterClass dstClass, Operand addrClass,

2
lib/Target/R600/AMDGPUIntrinsics.td
View File

@ -50,8 +50,6 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in {
def int_AMDGPU_umax : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_AMDGPU_umin : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_AMDGPU_cube : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
def int_AMDGPU_shader_type : Intrinsic<[], [llvm_i32_ty], []>;
}
let TargetPrefix = "TGSI", isTarget = 1 in {

1
lib/Target/R600/R600ISelLowering.cpp
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@ -105,7 +105,6 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
switch (MI->getOpcode()) {
default: return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
case AMDGPU::SHADER_TYPE: break;
case AMDGPU::CLAMP_R600: {
MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
AMDGPU::MOV,

6
lib/Target/R600/SIISelLowering.cpp
View File

@ -83,12 +83,6 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
default:
return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
case AMDGPU::BRANCH: return BB;
case AMDGPU::SHADER_TYPE:
BB->getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType =
MI->getOperand(0).getImm();
MI->eraseFromParent();
break;
case AMDGPU::SI_INTERP:
LowerSI_INTERP(MI, *BB, I, MRI);
break;

18
lib/Target/R600/SIMachineFunctionInfo.cpp
View File

@ -10,11 +10,25 @@
#include "SIMachineFunctionInfo.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Function.h"
using namespace llvm;
const char *SIMachineFunctionInfo::ShaderTypeAttribute = "ShaderType";
SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
: MachineFunctionInfo(),
SPIPSInputAddr(0),
ShaderType(0)
{ }
ShaderType(0) {
AttributeSet Set = MF.getFunction()->getAttributes();
Attribute A = Set.getAttribute(AttributeSet::FunctionIndex,
ShaderTypeAttribute);
if (A.isStringAttribute()) {
StringRef Str = A.getValueAsString();
if (Str.getAsInteger(0, ShaderType))
llvm_unreachable("Can't parse shader type!");
}
}

2
lib/Target/R600/SIMachineFunctionInfo.h
View File

@ -23,6 +23,8 @@ namespace llvm {
/// tells the hardware which interpolation parameters to load.
class SIMachineFunctionInfo : public MachineFunctionInfo {
public:
static const char *ShaderTypeAttribute;
SIMachineFunctionInfo(const MachineFunction &MF);
unsigned SPIPSInputAddr;
unsigned ShaderType;