6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-09-27 16:17:17 +00:00
Code Issues Projects Releases Wiki Activity

Added inst combine transforms for single bit tests from Chris's note

Browse Source 
if ((x & C) == 0) x |= C becomes x |= C
if ((x & C) != 0) x ^= C becomes x &= ~C
if ((x & C) == 0) x ^= C becomes x |= C
if ((x & C) != 0) x &= ~C becomes x &= ~C
if ((x & C) == 0) x &= ~C becomes nothing

Differential Revision: http://reviews.llvm.org/D3777



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210006 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dinesh Dwivedi
2014-06-02 07:24:36 +00:00
parent 01fa655228
commit c469e543a0
2 changed files with 133 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
lib/Transforms/InstCombine/InstCombineSelect.cpp
View File

@@ -365,7 +365,15 @@ static Value *SimplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
/// 1. The icmp predicate is inverted /// 1. The icmp predicate is inverted
/// 2. The select operands are reversed /// 2. The select operands are reversed
/// 3. The magnitude of C2 and C1 are flipped /// 3. The magnitude of C2 and C1 are flipped
static Value *foldSelectICmpAndOr(const SelectInst &SI, Value *TrueVal, ///
/// This also tries to turn
/// --- Single bit tests:
/// if ((x & C) == 0) x |= C to x |= C
/// if ((x & C) != 0) x ^= C to x &= ~C
/// if ((x & C) == 0) x ^= C to x |= C
/// if ((x & C) != 0) x &= ~C to x &= ~C
/// if ((x & C) == 0) x &= ~C to nothing
static Value *foldSelectICmpAndOr(SelectInst &SI, Value *TrueVal,
Value *FalseVal, Value *FalseVal,
InstCombiner::BuilderTy *Builder) { InstCombiner::BuilderTy *Builder) {
const ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition()); const ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition());
@@ -384,6 +392,25 @@ static Value *foldSelectICmpAndOr(const SelectInst &SI, Value *TrueVal,
return nullptr; return nullptr;
const APInt *C2; const APInt *C2;
if (match(TrueVal, m_Specific(X))) {
// if ((X & C) != 0) X ^= C becomes X &= ~C
if (match(FalseVal, m_Xor(m_Specific(X), m_APInt(C2))) && C1 == C2)
return Builder->CreateAnd(X, ~(*C1));
// if ((X & C) != 0) X &= ~C becomes X &= ~C
if (match(FalseVal, m_And(m_Specific(X), m_APInt(C2))) && *C1 == ~(*C2))
return FalseVal;
} else if (match(FalseVal, m_Specific(X))) {
// if ((X & C) == 0) X ^= C becomes X |= C
if (match(TrueVal, m_Xor(m_Specific(X), m_APInt(C2))) && C1 == C2)
return Builder->CreateOr(X, *C1);
// if ((X & C) == 0) X &= ~C becomes nothing
if (match(TrueVal, m_And(m_Specific(X), m_APInt(C2))) && *C1 == ~(*C2))
return X;
// if ((X & C) == 0) X |= C becomes X |= C
if (match(TrueVal, m_Or(m_Specific(X), m_APInt(C2))) && C1 == C2)
return TrueVal;
}
bool OrOnTrueVal = false; bool OrOnTrueVal = false;
bool OrOnFalseVal = match(FalseVal, m_Or(m_Specific(TrueVal), m_Power2(C2))); bool OrOnFalseVal = match(FalseVal, m_Or(m_Specific(TrueVal), m_Power2(C2)));
if (!OrOnFalseVal) if (!OrOnFalseVal)

105
test/Transforms/InstCombine/select.ll
View File

@@ -996,6 +996,111 @@ define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) {
ret <2 x i32> %select ret <2 x i32> %select
} }
; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8(
; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8
; CHECK-NEXT: ret i32 [[OR]]
define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%or = or i32 %x, 8
%or.x = select i1 %cmp, i32 %or, i32 %x
ret i32 %or.x
}
; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8(
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9
; CHECK-NEXT: ret i32 [[AND]]
define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%xor = xor i32 %x, 8
%x.xor = select i1 %cmp, i32 %x, i32 %xor
ret i32 %x.xor
}
; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8(
; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8
; CHECK-NEXT: ret i32 [[OR]]
define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%xor = xor i32 %x, 8
%xor.x = select i1 %cmp, i32 %xor, i32 %x
ret i32 %xor.x
}
; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9
; CHECK-NEXT: ret i32 [[AND]]
define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%and1 = and i32 %x, -9
%x.and1 = select i1 %cmp, i32 %x, i32 %and1
ret i32 %x.and1
}
; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
; CHECK-NEXT: ret i32 %x
define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%and1 = and i32 %x, -9
%and1.x = select i1 %cmp, i32 %and1, i32 %x
ret i32 %and1.x
}
; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8(
; CHECK: select i1 %cmp, i64 %y, i64 %xor
define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%xor = xor i64 %y, 8
%y.xor = select i1 %cmp, i64 %y, i64 %xor
ret i64 %y.xor
}
; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8(
; CHECK: select i1 %cmp, i64 %y, i64 %and1
define i64 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i64 %y) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%and1 = and i64 %y, -9
%y.and1 = select i1 %cmp, i64 %y, i64 %and1
ret i64 %y.and1
}
; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8(
; CHECK: select i1 %cmp, i64 %xor, i64 %y
define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%xor = xor i64 %y, 8
%xor.y = select i1 %cmp, i64 %xor, i64 %y
ret i64 %xor.y
}
; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8(
; CHECK: select i1 %cmp, i64 %and1, i64 %y
define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%and1 = and i64 %y, -9
%and1.y = select i1 %cmp, i64 %and1, i64 %y
ret i64 %and1.y
}
; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8(
; CHECK: xor i64 %1, 8
; CHECK: or i64 %2, %y
define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) {
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%or = or i64 %y, 8
%or.y = select i1 %cmp, i64 %or, i64 %y
ret i64 %or.y
}
define i32 @test65(i64 %x) { define i32 @test65(i64 %x) {
%1 = and i64 %x, 16 %1 = and i64 %x, 16
%2 = icmp ne i64 %1, 0 %2 = icmp ne i64 %1, 0