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Turn this into a table, this will make more sense shortly.

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Part of rdar://8470697


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131200 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-05-11 21:44:58 +00:00
parent 007cfce220
commit c493a1f317
1 changed files with 29 additions and 11 deletions
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40
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -1482,6 +1482,22 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadAdd(SDNode *Node, EVT NVT) {
} }
} }
static const unsigned int AtomicOpcTbl[1][11] = {
{
X86::LOCK_OR8mi,
X86::LOCK_OR8mr,
X86::LOCK_OR16mi8,
X86::LOCK_OR16mi,
X86::LOCK_OR16mr,
X86::LOCK_OR32mi8,
X86::LOCK_OR32mi,
X86::LOCK_OR32mr,
X86::LOCK_OR64mi8,
X86::LOCK_OR64mi32,
X86::LOCK_OR64mr
}
};
SDNode *X86DAGToDAGISel::SelectAtomicLoadOr(SDNode *Node, EVT NVT) { SDNode *X86DAGToDAGISel::SelectAtomicLoadOr(SDNode *Node, EVT NVT) {
if (Node->hasAnyUseOfValue(0)) if (Node->hasAnyUseOfValue(0))
return 0; return 0;
@ -1504,41 +1520,43 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadOr(SDNode *Node, EVT NVT) {
Val = CurDAG->getTargetConstant(CN->getSExtValue(), NVT); Val = CurDAG->getTargetConstant(CN->getSExtValue(), NVT);
} }
// Which index into the table.
unsigned index = 0;
unsigned Opc = 0; unsigned Opc = 0;
switch (NVT.getSimpleVT().SimpleTy) { switch (NVT.getSimpleVT().SimpleTy) {
default: return 0; default: return 0;
case MVT::i8: case MVT::i8:
if (isCN) if (isCN)
Opc = X86::LOCK_OR8mi; Opc = AtomicOpcTbl[index][0];
else else
Opc = X86::LOCK_OR8mr; Opc = AtomicOpcTbl[index][1];
break; break;
case MVT::i16: case MVT::i16:
if (isCN) { if (isCN) {
if (immSext8(Val.getNode())) if (immSext8(Val.getNode()))
Opc = X86::LOCK_OR16mi8; Opc = AtomicOpcTbl[index][2];
else else
Opc = X86::LOCK_OR16mi; Opc = AtomicOpcTbl[index][3];
} else } else
Opc = X86::LOCK_OR16mr; Opc = AtomicOpcTbl[index][4];
break; break;
case MVT::i32: case MVT::i32:
if (isCN) { if (isCN) {
if (immSext8(Val.getNode())) if (immSext8(Val.getNode()))
Opc = X86::LOCK_OR32mi8; Opc = AtomicOpcTbl[index][5];
else else
Opc = X86::LOCK_OR32mi; Opc = AtomicOpcTbl[index][6];
} else } else
Opc = X86::LOCK_OR32mr; Opc = AtomicOpcTbl[index][7];
break; break;
case MVT::i64: case MVT::i64:
if (isCN) { if (isCN) {
if (immSext8(Val.getNode())) if (immSext8(Val.getNode()))
Opc = X86::LOCK_OR64mi8; Opc = AtomicOpcTbl[index][8];
else if (i64immSExt32(Val.getNode())) else if (i64immSExt32(Val.getNode()))
Opc = X86::LOCK_OR64mi32; Opc = AtomicOpcTbl[index][9];
} else } else
Opc = X86::LOCK_OR64mr; Opc = AtomicOpcTbl[index][10];
break; break;
} }