mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-24 23:19:03 +00:00
Improve Mips back-end's handling of DBG_VALUE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134224 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -38,6 +38,8 @@
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Analysis/DebugInfo.h"
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using namespace llvm;
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using namespace llvm;
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namespace {
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namespace {
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@@ -75,6 +77,10 @@ namespace {
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void EmitInstruction(const MachineInstr *MI) {
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void EmitInstruction(const MachineInstr *MI) {
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SmallString<128> Str;
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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raw_svector_ostream OS(Str);
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if (MI->isDebugValue())
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PrintDebugValueComment(MI, OS);
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printInstruction(MI, OS);
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printInstruction(MI, OS);
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OutStreamer.EmitRawText(OS.str());
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OutStreamer.EmitRawText(OS.str());
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}
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}
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@@ -86,6 +92,9 @@ namespace {
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virtual void EmitFunctionEntryLabel();
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virtual void EmitFunctionEntryLabel();
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void EmitStartOfAsmFile(Module &M);
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void EmitStartOfAsmFile(Module &M);
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virtual MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
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void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
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};
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};
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} // end of anonymous namespace
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} // end of anonymous namespace
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@@ -441,6 +450,21 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
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OutStreamer.EmitRawText(StringRef("\t.previous"));
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OutStreamer.EmitRawText(StringRef("\t.previous"));
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}
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}
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MachineLocation
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MipsAsmPrinter::getDebugValueLocation(const MachineInstr *MI) const {
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// Handles frame addresses emitted in MipsInstrInfo::emitFrameIndexDebugValue.
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assert(MI->getNumOperands() == 4 && "Invalid no. of machine operands!");
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assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm() &&
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"Unexpected MachineOperand types");
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return MachineLocation(MI->getOperand(0).getReg(),
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MI->getOperand(1).getImm());
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}
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void MipsAsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
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raw_ostream &OS) {
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// TODO: implement
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}
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// Force static initialization.
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// Force static initialization.
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extern "C" void LLVMInitializeMipsAsmPrinter() {
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extern "C" void LLVMInitializeMipsAsmPrinter() {
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RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
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RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
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@@ -217,6 +217,15 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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llvm_unreachable("Register class not handled!");
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llvm_unreachable("Register class not handled!");
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}
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}
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MachineInstr*
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MipsInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF, int FrameIx,
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uint64_t Offset, const MDNode *MDPtr,
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DebugLoc DL) const {
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MachineInstrBuilder MIB = BuildMI(MF, DL, get(Mips::DBG_VALUE))
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.addFrameIndex(FrameIx).addImm(0).addImm(Offset).addMetadata(MDPtr);
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return &*MIB;
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Branch Analysis
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// Branch Analysis
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@@ -224,6 +224,11 @@ public:
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const TargetRegisterClass *RC,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const;
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const TargetRegisterInfo *TRI) const;
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virtual MachineInstr* emitFrameIndexDebugValue(MachineFunction &MF,
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int FrameIx, uint64_t Offset,
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const MDNode *MDPtr,
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DebugLoc DL) const;
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virtual
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virtual
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bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
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bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
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@@ -16,7 +16,7 @@ using namespace llvm;
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MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) {
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MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) {
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AlignmentIsInBytes = false;
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AlignmentIsInBytes = false;
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Data16bitsDirective = "\t.half\t";
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Data16bitsDirective = "\t.2byte\t";
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Data32bitsDirective = "\t.4byte\t";
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Data32bitsDirective = "\t.4byte\t";
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Data64bitsDirective = 0;
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Data64bitsDirective = 0;
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PrivateGlobalPrefix = "$";
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PrivateGlobalPrefix = "$";
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@@ -35,6 +35,7 @@
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Analysis/DebugInfo.h"
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#define GET_REGINFO_MC_DESC
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#define GET_REGINFO_MC_DESC
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#define GET_REGINFO_TARGET_DESC
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#define GET_REGINFO_TARGET_DESC
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@@ -179,30 +180,6 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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<< "spOffset : " << spOffset << "\n"
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<< "spOffset : " << spOffset << "\n"
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<< "stackSize : " << stackSize << "\n");
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<< "stackSize : " << stackSize << "\n");
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int Offset;
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// Calculate final offset.
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// - There is no need to change the offset if the frame object is one of the
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// following: an outgoing argument, pointer to a dynamically allocated
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// stack space or a $gp restore location,
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// - If the frame object is any of the following, its offset must be adjusted
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// by adding the size of the stack:
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// incoming argument, callee-saved register location or local variable.
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if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isGPFI(FrameIndex) ||
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MipsFI->isDynAllocFI(FrameIndex))
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Offset = spOffset;
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else
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Offset = spOffset + stackSize;
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Offset += MI.getOperand(i-1).getImm();
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DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
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unsigned NewReg = 0;
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int NewImm = 0;
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MachineBasicBlock &MBB = *MI.getParent();
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bool ATUsed;
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unsigned FrameReg;
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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int MinCSFI = 0;
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int MinCSFI = 0;
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int MaxCSFI = -1;
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int MaxCSFI = -1;
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@@ -218,12 +195,44 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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// 3. Locations for callee-saved registers.
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// 3. Locations for callee-saved registers.
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// Everything else is referenced relative to whatever register
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// Everything else is referenced relative to whatever register
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// getFrameRegister() returns.
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// getFrameRegister() returns.
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unsigned FrameReg;
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if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isDynAllocFI(FrameIndex) ||
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if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isDynAllocFI(FrameIndex) ||
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(FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
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(FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
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FrameReg = Mips::SP;
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FrameReg = Mips::SP;
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else
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else
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FrameReg = getFrameRegister(MF);
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FrameReg = getFrameRegister(MF);
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// Calculate final offset.
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// - There is no need to change the offset if the frame object is one of the
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// following: an outgoing argument, pointer to a dynamically allocated
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// stack space or a $gp restore location,
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// - If the frame object is any of the following, its offset must be adjusted
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// by adding the size of the stack:
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// incoming argument, callee-saved register location or local variable.
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int Offset;
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if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isGPFI(FrameIndex) ||
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MipsFI->isDynAllocFI(FrameIndex))
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Offset = spOffset;
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else
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Offset = spOffset + stackSize;
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if (MI.isDebugValue()) {
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MI.getOperand(i).ChangeToRegister(FrameReg, false /*isDef*/);
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MI.getOperand(i+1).ChangeToImmediate(Offset);
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return;
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}
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Offset += MI.getOperand(i-1).getImm();
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DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
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unsigned NewReg = 0;
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int NewImm = 0;
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MachineBasicBlock &MBB = *MI.getParent();
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bool ATUsed;
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// Offset fits in the 16-bit field
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// Offset fits in the 16-bit field
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if (Offset < 0x8000 && Offset >= -0x8000) {
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if (Offset < 0x8000 && Offset >= -0x8000) {
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NewReg = FrameReg;
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NewReg = FrameReg;
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